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Gowin DDS II
Introduction
Gowin DDS II IP implements the function of Direct Digital Synthesizer (DDS). The core supports sine, cosine, or quadrature output functions with an output sampling resolution of 4 to 25 bits, and a phase output function is also supported. The core can be configured individually as a phase generator and a sine-cosine lookup table. The core supports time-multiplexing up to 16 channels. The core enables high dynamic range signals with minimal FPGA resources through Phase Dithering and Taylor Series Correction options. The core also has an optional phase offset capability.
Features
- Phase generator and SIN/COS lookup table can be generated separately or together with optional dithering to provide a complete DDS solution
- Sine, cosine or quadrature output
- Optional per-channel cumulative phase resynchronization
- Optional Phase Dithering can expand spectral line energy to achieve greater spurious-free dynamic range (SFDR)
- Phase Dithering or Taylor series correction options provide high dynamic range signals with minimal FPGA resources. Supports SFDR from 24dB to 150dB.
- Up to 16 independent time-division multiplexing channels
- Use up to 48-bit phase accumulator to achieve fine frequency resolution
- 4-bit to 25-bit signed output sample precision