Job Highlights

• Hands-on experience in FPGA design, RTL development, and verification

• Develop AI-powered tools and automated FPGA design workflows

• Work location: Hong Kong Science Park, Sha Tin

• Fresh graduates are welcome to apply
  
  

Job Description

• Design, implement, and optimize FPGA IP cores and reference designs to support the development of next-generation FPGA solutions

• Develop AI-powered workflows using Large Language Models (LLMs) to automate HDL generation, simulation, verification, and FPGA development tasks

• Build software tools, APIs, and command-line interfaces to integrate AI agents with FPGA design tools and engineering workflows

• Collaborate with engineering teams to improve FPGA development efficiency through AI-driven automation
  
  

Job Requirements

• Bachelor’s degree or above in electronic engineering, computer engineering, computer science, or related disciplines

• Hands-on experience in FPGA design and development

• Proficiency in Verilog, VHDL, or SystemVerilog, with a strong understanding of digital logic and computer architecture

• Experience with FPGA design tools, including synthesis, place-and-route, and timing analysis

• Familiarity with simulation and verification tools such as ModelSim or Questa

• Strong programming skills in Python and experience developing software tools

• Familiarity with AI agent frameworks, Large Language Models (LLMs), and cloud-based or local AI deployment

• Strong problem-solving and analytical skills

• Must be a highly organized, detail-oriented self-starter who can work independently as well as in a team environment

• Fluent verbal and written communication skills in English and Chinese

• Senior positions will be offered based on relevant experience; fresh graduates are welcome to apply
  
  

Interested parties please send full resume with expected salary to thomas@gowinsemi.com.