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Gowin MIPI DSI/CSI-2 Transmitter
Introduction
Gowin MIPI DSI/CSI-2 Transmitter IP receives byte-aligned pixelstreams and synchronization control signals, and composes pixel data frames and synchronization control frames in accordance with the DSI/CSI-2 protocol and user-configured parameters, and then drives the Gowin MIPI D-PHY TX Advance IP interface to realize MIPI DSI/CSI-2 DPHY
transmission.
The current version simplifies the transmission logic. In DSI mode, it temporarily supports only single-packet mode. Similar to CSI-2 mode, it sends only one short packet or one long packet in a single transmission, which reduces resource utilization.
Features
- Complies with MIPI DSI V1.1 and MIPI CSI-2 V1.1 standards
- Supports MIPI D-PHY TX input with 1, 2, 3, or 4 data lanes
- Supports MIPI D-PHY TX mode with 8:1 and 1:16
- Supports various data types (DT) with different virtual channel (VC) identifiers
- Supports ECC generation for packet headers
- Supports CRC generation for the data byte stream (optional)
- Supports continuous clock mode (non-continuous clock mode is currently not supported)
- Supports Low Power (LP) mode during vertical and horizontal blank interval
- Supports the insertion of End of Transmission Packet (EoTP) short packets as defined in the MIPI DSI standard
- Supports three video modes as defined in the MIPI DSI standard
- Non-burst mode with sync pulses
- Non-burst mode with sync events
- Burst mode