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Gowin SPI Flash Interface

IP Introduction

The Gowin SPI Flash Interface IP allows designers to create custom systems in one Gowin device that connect easily to Flash chips. This IP located between the Flash Memory and the user's logic, reduces the user's effort to deal with the Flash Memory command interface by providing AHB or APB interface to the user.

 

The design has these features:

  • Support AHB and APB bus configuration interface
  • Support Normal, Dual and Quad SPI interface
  • Support memory-mapped access(read only)
  • Support configurable SPI SCLK
  • Support configurable TX / RX FIFO depth
Documents Download
RefDesign Gowin SPIFlash Interface RefDesign Download
User Guide Gowin SPI Flash Interface IP User Guide Download
Contact Sample