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DK_PCIE_GW5ART-LV15MG132P_V1.1
The Gowin GW5ART series FPGAs are the fifth generation of the Gowin Chenxi family of FPGAs. They are system-in-package (SoCs) with abundant internal resources, integrating a PCIe 3.0 hard core, supporting high-speed SerDes custom protocols from 270 Mbps to 12.5Gbps, integrated PSRAM memory, a newly designed high-performance DSP supporting AI computing, a high-speed LVDS interface, and abundant BSRAM memory resources. They also integrate MIPI D-PHY and MIPI C-PHY hard cores and are available in various pinout packages. These embedded resources, combined with 22nm SRAM technology, make the GW5ART series FPGAs suitable for low-power, high-performance, and compatible design applications.
The development board is compatible with PCIe 3.0 communication, MIPI-DPHY communication, MIPI-CPHY communication, and LVDS interface communication, meeting various application needs such as FPGA functional evaluation, hardware reliability verification, and software learning and debugging.
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DK_PCIE_GW5ART-LV15MG132P_V1.1Development Board User Guide |
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DK_PCIE_GW5ART-LV15MG132P_V1.1 SCH |
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