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GOWIN EDA (YunYuan®) – our easy to use integrated design environment provides design engineers one-stop solution from design entry to verification.



  • Complete GUI based environment from FPGA design entry, code synthesis, place & route, bitsteam generation to download on the GOWIN FPGA on your boards.
  • Integrates SimplyPRO® from Synopsys® for front end design synthesis
  • Supports creating RTL and Post-Synthesis.
    • RTL input files are RTL file complied with Hardware Description
  • Language and constraints file that users requires;
    • Post-Synthesis input files are netlist file generated by user RTL
  • synthesis and constraints files that users required.
  • Integrates IP Core Generator
  • Online debug tool Gowin Analysis Oscilloscope (GAO) for instant analyze of signal design


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