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GOWIN x JLCPCB Image

GOWIN Semiconductor Collaborates with JLCPCB to Expand Access to FPGA Prototyping and Small-Volume Production New cooperation supports makers, educators, and commercial teams requiring fast, low-quantity FPGA access Date – April 30, 2026 — GOWIN Semiconductor today announced a collaboration with JLCPCB, a global PCB fabrication and assembly provider, aimed at improving access to FPGA devices for developers requiring fast prototyping, small-volume production, and low-friction hardware development. Through this cooperation, selected GOWIN FPGA devices will be available within JLCPCB’s component ecosystem via LCSC, enabling simplified sourcing alongside PCB fabrication and assembly services. This approach allows developers to move efficiently from concept to working hardware, reducing the barriers typically associated with small-quantity FPGA procurement. In addition, GOWIN devices are also becoming available through platforms such as HQchip, further expanding access for customers seeking flexible sourcing options across different procurement channels. The collaboration supports a broad range of users — from makers, students, and open-source developers to commercial engineering teams needing rapid prototyping or low-volume production ahead of scale-up. Initial availability will focus on widely used devices within the open hardware ecosystem, including those commonly deployed in Tang Nano, Tang Mega, and related FPGA development platforms. "This collaboration reflects our commitment to lowering barriers to FPGA adoption," said Mike Furnival, VP of International Sales at GOWIN Semiconductor. "By cooperating with platforms like JLCPCB, we are enabling developers, educators, and engineering teams to prototype and iterate faster, while maintaining a clear and supported path to scalable production." Enabling Fast and Accessible FPGA Development The cooperation with JLCPCB enables rapid prototyping and small-volume builds through integrated PCB fabrication and assembly services. It simplifies access to FPGA devices for makers, students, startups, and commercial R&D teams, while supporting fast hardware iteration without complex sourcing requirements or minimum order constraints. Supporting Flexible Paths from Prototype to Production GOWIN continues to support customers across the full development lifecycle through a complementary, multi-channel approach. This includes: Collaboration with JLCPCB for convenient prototyping and low-volume production Availability through distribution platforms such as HQchip for flexible component sourcing Direct engagement with GOWIN’s global sales organization for volume production, long-term supply assurance, and technical support Availability Selected GOWIN FPGA devices are expected to become available through JLCPCB’s component ecosystem in the coming months, with additional devices introduced based on community and customer demand. About GOWIN Semiconductor Corporation Founded in 2014, GOWIN Semiconductor Corporation is dedicated to advancing embedded innovation through high-performance, power-efficient FPGA solutions. Serving markets including industrial automation, robotics, consumer electronics, communications, and emerging AR/VR applications, GOWIN provides flexible and scalable platforms that help customers bring differentiated products to market faster.

Press Release GW1AN:GW3A Final

GOWIN Semiconductor Announces New FPGA Families for 2026 London, UK, and Guangzhou, China, March 9, 2026GW1AN and GW3A Expand GOWIN’s Small and Medium FPGA Portfolio GOWIN Semiconductor today announced the launch of its next-generation Arora GW1AN and GW3A FPGA families, expanding its programmable logic portfolio with compact architectures, efficient integration, and dependable performance across industrial, consumer, and embedded applications. Designed to support the complete FPGA decision chain — including hardware architects, FPGA developers, engineering managers, and component procurement teams — the new families emphasize migration flexibility, sourcing stability, and long-term production planning across EMEA, the United States, and Japan. Arora GW1AN: Expanded Small FPGA Integration The Arora GW1AN family introduces an enhanced small FPGA architecture focused on system-level efficiency and integration flexibility. Key features include: Redesigned packaging for improved board compatibility Hardened embedded IP subsystems to reduce development complexity Integrated user flash supporting background programming and multi-image reliability Higher-precision ADC resources for monitoring and control systems Pin-compatible migration paths enabling dual-source and risk mitigation strategies The GW1AN series is positioned for industrial control, embedded processing, power management, and cost-sensitive programmable logic designs where compact footprint and long lifecycle support are essential. GW3A: New Medium FPGA Performance Class The GW3A family introduces a hybrid LUT4/LUT6 FPGA architecture combined with optimized hard IP blocks to deliver balanced performance and efficient silicon utilization. With logic densities ranging from approximately 6K to 90K LUTs, GW3A supports: Industrial automation platforms Machine vision systems Video bridging and display connectivity Embedded interface and control applications The architecture is designed to provide strong integration capability while maintaining footprint efficiency for small to medium programmable designs. Designed for Real-World Engineering Requirements Both FPGA families integrate hardened functional blocks aligned with practical system demands, including: Deterministic timing for motor control and FoC applications MIPI connectivity for imaging and vision systems Flexible display and interface bridging Integrated ADC and DSP resources for power and energy applications These capabilities allow designers to reduce external components, simplify system architecture, and optimize board-level efficiency. Regional Focus and Supply Chain Stability The 2026 portfolio expansion reinforces GOWIN’s commitment to: Strong 3.3V I/O drive capability Simplified configuration flows Alignment with legacy device architectures Predictable production planning These attributes address the sourcing, lifecycle, and supply chain priorities of customers across EMEA, the US, and Japan. Executive Perspective “With the introduction of the Arora GW1AN and GW3A families, we are strengthening GOWIN’s position in both the small and medium FPGA markets,” said Mike Furnival, VP International Sales and GM of the UK Office at GOWIN Semiconductor. “Our customers are asking for integration efficiency, migration flexibility, and dependable production planning. These new families are designed specifically to address those needs while delivering the performance and architectural balance modern embedded systems require.” Availability The Arora GW1AN and GW3A families will roll out throughout 2026, with technical documentation, development tools, and evaluation platforms available through GOWIN’s global support network. For detailed specifications, evaluation hardware, or migration support, please contact your local GOWIN Semiconductor representative or visit the GOWIN Technical Resource Center. About GOWIN Semiconductor Corporation Founded in 2014, GOWIN Semiconductor Corporation is dedicated to advancing embedded innovation through high-performance, power-efficient FPGA solutions. Serving markets including industrial automation, robotics, consumer electronics, communications, and emerging AR/VR applications, GOWIN provides flexible and scalable platforms that help customers bring differentiated products to market faster.

Embedded World Conference Flyer 2026 Website (2100 × 696 px)

GOWIN Semiconductor to Exhibit at Embedded World 2026 London, UK, and Guangzhou, China, January 22, 2026GOWIN Semiconductor Corporation, a leading global provider of FPGA solutions, is pleased to announce its participation in Embedded World 2026, taking place March 10–12, 2026, in Nuremberg, Germany. This marks GOWIN’s continued presence at the world’s premier embedded systems exhibition. Attendees are invited to visit Hall 3A, Stand 340, where GOWIN will connect with developers, partners, and system designers shaping the future of embedded computing. Enabling Next-Generation Embedded Systems with FPGAs As embedded applications continue to evolve, system designers face growing demands for real-time performance, low latency, power efficiency, and interface flexibility. FPGAs play a critical role in addressing these challenges by enabling highly parallel processing, deterministic behavior, and adaptable hardware architectures. At Embedded World 2026, GOWIN will highlight how its FPGA platforms support a wide range of modern embedded use cases - particularly in AR/VR, robotics, and intelligent edge systems-where responsiveness, efficiency, and system integration are key. Focus Areas at Embedded World 2026 AR/VR Systems Augmented and virtual reality applications place strict requirements on latency, bandwidth, and power consumption. GOWIN FPGAs are well suited for AR/VR system architectures, enabling: Real-time sensor processing and display pipelines Ultra-low-latency data paths to reduce motion-to-photon delay Flexible support for high-speed display and camera interfaces Efficient offloading of vision and AI-related workloads Robotics and Intelligent Automation Robotics systems demand precise timing, deterministic control, and seamless integration of sensors, motors, and communication interfaces. GOWIN FPGAs help robotics developers: Implement real-time motor control and motion algorithms Process sensor and vision data with low and predictable latency Integrate multiple interfaces within a single, flexible platform Scale designs from prototyping to production efficiently Flexible FPGA Platforms for Embedded Innovation Across AR/VR, robotics, industrial, and consumer applications, GOWIN’s FPGA portfolio supports designers with: Power-efficient architectures suitable for edge and mobile systems Pin-compatible device options to simplify design migration Cost-effective solutions that balance performance and system integration A growing ecosystem of development tools, IP, and reference designs Join GOWIN at Embedded World 2026 “We’re excited to return to Embedded World and continue conversations with the global embedded community,” said Mike Furnival, Vice President of International Sales at GOWIN Semiconductor. “Embedded systems are becoming more complex and performance-driven, and FPGAs remain a powerful enabler for applications like AR/VR and robotics. Embedded World is an ideal place to exchange ideas and explore how flexible FPGA platforms can support next-generation designs.” GOWIN invites attendees to stop by Hall 3A, Stand 340 to discuss application challenges, system architectures, and how FPGAs can accelerate embedded innovation. Supporting Resources Schedule a Meeting: To arrange a meeting with GOWIN Semiconductor at Embedded World 2026, contact us at info@gowinsemi.com Learn More About GOWIN Semiconductor: https://www.gowinsemi.com/en/ Embedded World 2026 Information: https://www.embedded-world.de/en About GOWIN Semiconductor Corporation Founded in 2014, GOWIN Semiconductor Corporation is dedicated to advancing embedded innovation through high-performance, power-efficient FPGA solutions. Serving markets including industrial automation, robotics, consumer electronics, communications, and emerging AR/VR applications, GOWIN provides flexible and scalable platforms that help customers bring differentiated products to market faster.

AEC-Q100 Award

GOWIN Semiconductor’s 22nm Automotive-Grade FPGA Achieves AEC-Q100 Grade 1 Certification GOWIN Semiconductor’s 22nm Automotive-Grade FPGA Achieves AEC-Q100 Grade 1 Certification GOWIN Semiconductor has expanded its automotive-grade FPGA portfolio with another major milestone. The company’s 22nm FPGA device, GW5AT-LV60UG225A0, has successfully passed AEC-Q100 Grade 1 certification, the internationally recognized reliability standard for automotive electronics. Certification Ceremony Recently, GOWIN Semiconductor’s automotive-grade FPGA product, GW5AT-LV60UG225A0—developed on an advanced 22nm process—successfully completed AEC-Q100 Grade 1 qualification. This achievement represents another important breakthrough for GOWIN Semiconductor in the automotive electronics market. To mark the occasion, GOWIN Semiconductor and its long-term partner Suzhi Yite, a leading third-party verification and analysis service provider, jointly held a certification ceremony and strategic cooperation seminar. At the event, Cai Su Gu, Minister of the Reliability Engineering Department at Suzhi Yite, officially presented the AEC-Q100 certification to GOWIN Semiconductor. The certification not only validates the reliability of the GW5AT-LV60UG225A0 device but also reflects strong recognition of GOWIN Semiconductor’s capabilities in automotive chip design, process control, and quality management systems. (GOWIN Semiconductor Operations Director Li Shiming (left) and Cai Su Gu, Minister of Reliability Engineering Department, Suzhi Yite (right)) Supporting Next-Generation Automotive Applications Li Shiming, Operations Director of GOWIN Semiconductor, noted that the automotive industry is undergoing a rapid transformation driven by electrification and intelligent technologies, which is significantly increasing the demand for high-performance and highly reliable semiconductor solutions. GOWIN Semiconductor has maintained a forward-looking strategy in the automotive electronics market. The newly certified GW5AT-LV60UG225A0 FPGA is designed for a wide range of automotive applications, including: In-vehicle video display systems (image enhancement, local dimming, roof-mounted displays, and headrest displays) LiDAR systems AR-HUD and PHUD displays Intelligent driving domain controller co-processing These applications are enabled by the device’s rich video interface support, low power consumption, and high reliability. Continued Commitment to Automotive-Grade Quality To date, GOWIN Semiconductor has achieved AEC-Q100 certification for nearly 10 automotive-grade FPGA products, with additional devices currently undergoing certification. This progress demonstrates the company’s long-term commitment to the automotive market and highlights its strong R&D capabilities and robust quality management system for high-reliability products. Looking ahead, GOWIN Semiconductor will continue to expand its automotive-grade FPGA offerings, explore new automotive electronics applications, and contribute to improving the reliability and competitiveness of China’s automotive semiconductor supply chain. About GOWIN Semiconductor Founded in 2014, GOWIN Semiconductor Technology Co., Ltd. is a high-tech FPGA company specializing in the research, development, and design of field-programmable gate array (FPGA) devices. GOWIN provides comprehensive, end-to-end solutions covering FPGA devices, EDA development software, IP cores, development boards, and complete system solutions. Through years of technological innovation and ecosystem development, GOWIN Semiconductor has established independent core expertise in FPGA architecture, SoC design, integrated EDA platforms, and application solutions, supported by numerous domestic and international patents. GOWIN’s FPGA products have been successfully mass-produced and deployed across automotive, industrial control, power, communications, medical, and data center applications. About Suzhi Yite Founded in 2002, Suzhi Yite is a high-tech enterprise specializing in chip modification, failure analysis, reliability verification, wafer microstructure and material analysis, automotive component reliability testing, and board-level reliability evaluation. The company also provides advanced DPA analysis services for modern packaging technologies. Suzhi Yite serves customers across the semiconductor ecosystem—including chip design houses, wafer fabs, packaging and test facilities, and advanced equipment suppliers—offering comprehensive, one-stop verification and analysis services for integrated circuits.

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GOWIN Semiconductor’s EDA Software V1.9.12 Achieves ISO 26262 Certification from TÜV Rheinland, Delivering Full Functional Safety Support Across Its 22nm FPGA Product Line GOWIN Semiconductor’s EDA Software V1.9.12 Achieves ISO 26262 Certification from TÜV Rheinland, Delivering Full Functional Safety Support Across Its 22nm FPGA Product Line December 4, 2025 — GOWIN Semiconductor announced that its latest FPGA development tool, EDA Software V1.9.12, has successfully passed a rigorous evaluation by TÜV Rheinland, a global leader in testing, inspection, and certification. The software has earned two major international functional safety certifications: ISO 26262, for road vehicle functional safety, and IEC 61508, for safety-related electrical, electronic, and programmable electronic systems. This milestone further strengthens GOWIN’s capability to support high-reliability markets and mission-critical applications. Li Shiming, Senior Director of Operations at GOWIN Semiconductor (right), receives the certification from Zhao Bin, General Manager of Industrial Services and Information Security at TÜV Rheinland Greater China (left). The newly certified version, EDA Software V1.9.12, meets the stringent requirements of the highest automotive and industrial safety integrity levels (ASIL D / SIL 3) across design processes, verification toolchains, and development management workflows. A key highlight of this update is its complete functional safety support for GOWIN’s entire lineup of 22nm FPGA products, enabling customers to confidently develop solutions for: Automotive electronics (e.g., ADAS, vehicle gateways, motor control) Industrial automation (e.g., PLCs, industrial robots, safety I/O) Rail transportation systems Energy management and power systems — all of which demand exceptional reliability and functional safety compliance. Zhao Bin, General Manager of Industrial Services & Information Security at TÜV Rheinland Greater China, congratulated GOWIN on completing the certification upgrade. He acknowledged GOWIN’s leading efforts in FPGA functional safety certification and praised the company’s rigorous and disciplined approach to product development. Li Shiming, Senior Director of Operations at GOWIN Semiconductor, remarked: “Achieving ISO 26262 and IEC 61508 certification for our latest EDA Software V1.9.12 represents an important milestone in our commitment to delivering secure, reliable, and advanced solutions to customers worldwide. We extend our sincere gratitude to TÜV Rheinland for their professionalism and support throughout the certification process.” Why TÜV Certification for GOWIN EDA Software V1.9.12 Matters:A Complete Safety-Certified Development Platform: The GOWIN EDA toolchain—covering architectural design, synthesis, place-and-route, static timing analysis, and flow generation/verification—has been validated to meet functional safety standards across all components. Full Support for the Advanced 22nm FPGA PortfolioThe certification ensures that customers using GOWIN’s complete lineup of 22nm FPGAs can develop products that meet strict automotive and industrial safety requirements. Reduced Certification Costs and Risks for CustomersBy using a TÜV-certified development tool, automotive and industrial customers can streamline their own product safety certification processes, lowering risk and time-to-market while relying on a robust, domestically produced FPGA solution. As intelligent automotive systems and Industry 4.0 applications continue to evolve, the safety requirements for electronic systems grow more complex. The successful completion of this certification reinforces GOWIN Semiconductor’s competitive position in the global FPGA market and enables faster deployment of functional safety features across key industries. About GOWIN Semiconductor GOWIN Semiconductor is a leading integrated circuit design company focused on domestically produced FPGAs. The company provides a full suite of offerings, including FPGA chips, design software, IP cores, reference designs, and comprehensive technical support. GOWIN products are widely used in industrial control, communications, automotive electronics, consumer devices, and artificial intelligence applications. About TÜV Rheinland Founded in 1872, TÜV Rheinland is a globally recognized provider of testing, inspection, certification, training, and consulting services. With more than 20,000 specialists and a worldwide service network, the organization is dedicated to ensuring safety, reliability, and environmental responsibility across industries. TÜV Rheinland’s functional safety and cybersecurity teams—each with deep experience in R&D and international standards—are trusted worldwide for their expertise and industry leadership. The company was one of the earliest international organizations to establish dedicated cybersecurity and functional safety services in China.

Embedded World Conference Flyer Press Release (2100 × 696 px)

GOWIN Semiconductor to reveal FPGA-based motor control and video bridging design concepts at Embedded World 2025 Nuremberg, Germany - 6 March 2025 – Embedded OEMs in the industrial and consumer market segments can discover innovative solutions for motor control and video bridging as GOWIN Semiconductor unveils ground-breaking FPGA-based demonstration designs at the Embedded World exhibition (Nuremberg, Germany, 11-13 March 2025). The demonstration designs, as well as the company’s broad portfolio of low-density LittleBee and mid-range Arora V FPGA products, will be available to view at the GOWIN booth 3A-340 at Embedded World. The GW5AS Motor Control Demo illustrates GOWIN’s advanced current-loop control IP implementing a field-oriented control (FOC) scheme for a permanent magnet synchronous motor. Based on the GW5AS-25K FPGA solution, which combines a high-performance Arm® Cortex®-M4 processor operating at up to 288MHz with a 25K LUT Arora-V FPGA, this demonstration design provides precise torque and speed control for industrial motors. Intended for use in CNC machines, robots, and other industrial applications, the GW5AS system offers multi-motor control and ultra-fast current-loop calculations, resulting in very high performance and real-time control. The GW5AT Video Bridging Demo highlights the benefits of the high-speed, hard-wired SerDes blocks integrated in GOWIN’s latest GW5AT FPGAs. Featuring the GW5AT-60K FPGA, the demo showcases a robust and high-speed video bridging system capable of supporting 4K video streaming. ‘Returning to Embedded World after a highly successful 2024, we are excited to demonstrate how GOWIN’s FPGA technology is evolving to meet the diverse needs of both industrial and consumer markets,’ said Mike Furnival, VP of International Sales at GOWIN Semiconductor. ‘Our innovative solutions not only provide exceptional performance and cost efficiency, but also empower engineers to create smarter, more integrated designs across a range of applications.’ For more information about GOWIN Semiconductor and its portfolio of high-performance FPGA solutions, visit www.gowinsemi.com. About GOWIN Semiconductor Corporation Founded in 2014, Gowin Semiconductor Corp., headquartered with major R&D in China, has the vision to accelerate customer innovation worldwide with our programmable solutions. We focus on optimizing our products and removing barriers for customers using programmable logic devices. Our commitment to technology and quality enables customers to reduce the total cost of ownership from using FPGAs on their production boards. Our offerings include a broad portfolio of programmable logic devices, design software, intellectual property (IP) cores, reference designs, and development kits. We strive to serve customers in the consumer, industrial, communication, medical, and automotive markets worldwide. For more information about GOWIN Semiconductor, please visit: https://www.gowinsemi.com/en/ Copyright 2024 GOWIN Semiconductor Corp. GOWIN, LittleBee®, GW1N/NR/NS/1NSR/1NZ®, Arora®, Arora V®, GW2A/AR®, GOWIN EDA and other designated brands included herein are trademarks of GOWIN Semiconductor Corp. in China and other countries. All other trademarks are the property of their respective owners. For more information, please email info@gowinsemi.com. Media Contacts: Andrew Dudaronek, GOWIN Semiconductor andrew@gowinsemi.com Rhianna Ogle, TKO Marketing Consultants rhianna@tko.co.uk, tel: +44 1444 473555

EDA Mac OS Linkedin Pic 3

GOWIN Semiconductor Introduces Educational EDA Version V1.9.10.03 with macOS Support GOWIN Semiconductor Introduces Educational EDA Version V1.9.10.03 with macOS Support San Jose, California, and Guangzhou, China — November 29, 2024 GOWIN Semiconductor Corporation, the world's fastest-growing FPGA company, is thrilled to announce the release of GOWIN Educational EDA Version V1.9.10.03, a significant update to its license-free software platform. Designed for students, educators, and hobbyists, the educational version allows users to dive into FPGA programming without the need for a licensing process. In a groundbreaking first, this new version extends support to macOS, alongside Windows and Linux, making FPGA development accessible across all major operating systems. "A lot of university students and hobbyists are starting their college journey using a Mac, and I think we will see more CS students graduating and using macOS in the real world," said Jason Zhu, CEO of GOWIN Semiconductor. "We want GOWIN to be accessible for everyone, and we're excited to extend macOS support to our full EDA in the near future." GOWIN Educational EDA is tailored to remove barriers for entry-level users, offering reduced features in a lightweight, user-friendly environment. With macOS compatibility, GOWIN continues its mission to provide cutting-edge FPGA solutions that align with modern user needs. For more information and to download the educational EDA, visit www.gowinsemi.com. About GOWIN Semiconductor Corporation Founded in 2014, Gowin Semiconductor Corp., headquartered with major R&D in China, has the vision to accelerate customer innovation worldwide with our programmable solutions. We focus on optimizing our products and removing barriers for customers using programmable logic devices. Our commitment to technology and quality enables customers to reduce the total cost of ownership from using FPGA on their production boards. Our offerings include a broad portfolio of programmable logic devices, design software, intellectual property (IP) cores, reference designs, and development kits. We strive to serve customers in the consumer, industrial, communication, medical, and automotive markets worldwide. Copyright 2024 GOWIN Semiconductor Corp. GOWIN, LittleBee®, GW1N/NR/NS/1NSR/1NZ®, Arora®, Arora V®, GW2A/AR®, GOWIN EDA and other designated brands included herein are trademarks of GOWIN Semiconductor Corp. in China and other countries. All other trademarks are the property of their respective owners. For more information, please email info@gowinsemi.com Media Contact: Andrew Dudaronek andrew@gowinsemi.com

Growing demand for high-speed data in consumer devices gives rise to new generation of low-end FPGAs Growing demand for high-speed data in consumer devices gives rise to new generation of low-end FPGAs By Jason Zhu CEO, GOWIN Semiconductor When a designer of telecoms equipment such as a server or switch specifies an FPGA for a high-speed data interfacing function, performance is the most important criterion for choosing the preferred device. If the rule of thumb in specifying an electronics component is that the designer can have one or two of high speed, low power consumption, small size and low cost, but not three or all four of these attributes, the telecoms equipment manufacturer will prioritize high speed above the other factors. This has given the manufacturers of high-end, high-density FPGAs a strong incentive to develop products which are packed with high-performance SerDes capabilities, and which support the high-speed communications protocols – PCIe, Ethernet, Infiniband and so on – on which communications service providers’ fiber networks are based. These FPGAs might be large, they might be expensive, and they might be power-hungry – but this is of little importance to equipment manufacturers serving the telecoms market, as long as they are fast. How different it is in the market for portable and wearable consumer devices, where the cost, power consumption and size of an FPGA are impossible to overlook. This has meant that the FPGA’s role in consumer devices has generally been limited to functions which basic FPGAs – small, low-power, low-density and low-cost products – can perform, such as: Glue logic integration Simple counter Basic state machine Control logic I/O and interface bridging I/O expansion Aggregation of multiple sensor inputs Voltage monitoring For anything more demanding, the FPGA market did not in the past provide products which could meet the consumer market’s speed/cost/size requirements. In fact, there was no demand for the FPGA’s high-speed data interfacing capabilities for as long as consumer devices were handling relatively small amounts of data to support undemanding input and output devices such as a basic camera or a small display. But the consumer world is changing: technology and consumer demand are driving data throughput off the scale. We are discovering that there is almost no limit to people’s appetite for vivid, ultra high-definition (UHD) video and AI-enhanced high-resolution imaging, even in space- and power-deprived wearable products such as AR/VR headsets and smart glasses (see Figure 1). For instance, a VR headset will typically be required to cram the type of UHD content more normally viewed on a large TV screen on to two synchronized displays. Not only must the output achieve 4K or even 8K resolution, it must also be rendered at a higher frame rate – typically 128 frames/s – than a standard TV achieves, to avoid the risk of motion blur. Fig. 1: to create immersive experiences, a VR headset requires ultra high-definition display capability, and the internal data bandwidth to support it This is leading device manufacturers to migrate from interfaces such as MIPI D-PHY or DisplayPort for video to higher-speed alternatives such as MIPI C-PHY. And this calls for the type of high-speed SerDes capability that the telecoms equipment designer uses an FPGA to provide. But we know that the high-speed FPGAs developed for the telecoms market are not suitable for consumer devices. This is why I foresee the emergence of a new category of FPGA at the low-density, low-cost end of the market that has previously been limited to basic logic functions. This new-generation FPGA will be optimized for high-speed SerDes functions: it will offer not only raw high-speed SerDes capability, but will also specifically support the protocols that the new consumer devices is using, such as MIPI C-PHY and PCIe, either as soft-coded IP or even hard-coded into the silicon (see Figure 2). This SerDes capability will be backed by more generous provision of high-speed memory than is usual in low-end FPGAs. Fig. 2: examples of video bridging and processing use cases in the latest consumer devices Optimized for data-interfacing and data-bridging functions, this new generation of FPGA will provide limited scope for implementing other logic functions, with few general-purpose logic elements available to the application, in order to minimize die size and cost. GOWIN Semiconductor’s view is that such an FPGA demands a strategic shift from the manufacturers of low-density FPGAs. To date, they have met the requirement for low cost by stretching out the life of legacy process nodes used to fabricate their products, using a 40nm process or older, for which the investment in equipment and mask sets is relatively small. GOWIN itself has a strong position in consumer devices with its LittleBee family of low-density FPGAs, which are themselves built on a legacy process. The LittleBee FPGAs perform a data aggregation function in many wearable and mobile devices. Without data aggregation, sensor data would be transferred to the main microcontroller or system-on-chip (SoC), and commands or configuration data transferred from the SoC to sensors, over low-speed interfaces such as I2C, UART or SPI working as sideband communication channels. This results in the proliferation of wires between the SoC and sensor sub-systems, which are often mounted on a separate board from the main controller board. By implementing data aggregation in an FPGA, data from multiple sensors can be combined into a single high-speed data stream, reducing the number of physical network connections between the host and the various sub-systems. An example of the implementation of data aggregation is the OCP DC-SCM project in servers. While legacy fabrication processes might be adequate for the aggregation of low-speed I2C, UART or SPI interfaces, however, they are not going to meet the requirement for advanced SerDes circuitry: the MIPI C-PHY specification, for instance, supports a data rate of up to 13.7Gbps [1], offering as much as three times the bandwidth of the earlier MIPI D-PHY standard. This is why GOWIN took the radical decision to move to an advanced node – a TSMC 22nm ultra low-power process – for its Arora V family of low-density FPGAs. This 22nm process has allowed GOWIN to include a high-speed transceiver on-chip in the Arora V FPGAs. It has also enabled much larger memory provision: in the shift from the 55nm node used for LittleBee FPGAs to 22nm, the size of the memory cell shrinks by 90%. The practical consequence of the decision to adopt 22nm fabrication can be seen in the specifications of the Arora V GW5AT-60 product. It features four transceivers supporting a data-rate range of 270Mbps up to 12.5Gbps. A hardcore MIPI D-PHY interface offers four data lanes, and a hardcore MIPI C-PHY has three data lanes. Softcore interfaces include PCIe 2.0 (with 1, 2 and 4 lanes), and LVDS at up to 1.25Gbps, as well as a DDR3 interface operating at up to 1,333Mbps. Memory provision includes 118 blocks of 2,124kb block SRAM, and 468kb of shadow SRAM. The FPGA also includes 60k LUT4 logic elements. The device’s core voltage is 0.9V/1.0V/1.2V. This illustrates the way that, by fabricating at an advanced node, it becomes possible to create a low-density, low-power FPGA that provides for very high-speed data interfacing. And because of the small size of this FPGA, it can be offered at a unit cost which is affordable in wearable and portable consumer devices. In fact, the cost is attractive enough that OEMs can retain the FPGA in high-volume production, without having to contemplate replacing it with a custom ASIC, a step which is time consuming and risky, and which OEMs prefer to avoid. The commitment to an advanced silicon process in a product family which includes low-end FPGAs is now pointing the market in a new direction, one which combines the high-speed transceiver capabilities of traditional telecoms FPGAs with the low cost and low power consumption of traditional low-end FPGAs. There is a ready market for this new generation of FPGAs in consumer devices which use new high-speed transceiver capabilities to meet the needs, today, of ultra high-definition cameras and displays – and in future, potentially of additional high-speed peripherals supporting a new set of features and use cases driven by AI, AR and VR systems. Reference: [1] MIPI C-PHY maximum data rate, from: https://www.mipi.org/specifications/c-phy

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How silicon and circuit optimizations help FPGAs offer lower size, power and cost in video bridging applications How silicon and circuit optimizations help FPGAs offer lower size, power and cost in video bridging applications By Danny Fisher Director of International Marketing, GOWIN Semiconductor FPGAs are at home in the world of multi-gigabit-per-second signal conversion and bridging. In high-bandwidth telecoms, network and data center equipment, the FPGA is a mainstay of system designs, offering a valuable combination of high-speed SerDes capability, extensive logic resources, and programmability, giving designers the flexibility to modify features and functions without changing their board layout. Indeed, FPGA manufacturers have a long track record of creating products which are well suited to the telecoms central office or the data center environment: very fast and large chips which provide hundreds of I/Os, huge bandwidth, and built-in standard interfaces. The fact that they are also expensive and power-hungry is a bearable trade-off for telecoms and network equipment manufacturers. Increasingly, however, the need for multi-gigabit-per-second rates in signal bridging systems is extending from telecoms and network equipment into consumer and industrial devices. Here, too, the FPGA offers valuable benefits. But large, expensive, power-hungry ICs are a poor fit for sleek, battery-powered consumer devices in the ultra-competitive markets for products such as tablets, laptop computers, and augmented/virtual reality (AR/VR) headsets. This new demand in consumer electronics is forcing FPGA manufacturers to rethink the architecture of their products in a bid to provide high-speed SerDes functionality at lower cost and low power. Gamers lead the way The change which has precipitated a new wave of competition in the low-cost FPGA market has been led by demand from gamers: tablets and laptop computers have become the latest devices in which users want to play games in 4K resolution and – for smooth rendition of fast motion – at high frame rates of up to 160 frames/s. The requirement for high-speed video signal transmission to support 4K displays stretches the capability of the interfaces that have previously been used in consumer devices to shuttle data from the central system-on-chip (SoC) to a display. Older MIPI D-PHY interface technology is giving way to the newer MIPI C-PHY standard for the most demanding 4K display applications in tablets and laptop computers. The doubling of the data rate in the migration from D-PHY to C-PHY technology poses a demanding challenge for low-end FPGAs. Following the lead of the latest gaming tablets and computers, other use cases are now also starting to demand increased bandwidth in the link between an SoC and one or more displays, or between image sensors and an SoC. Examples include: Point-of-sale systems which split a single output from an SoC (typically in MIPI DSI format) to dual displays, one facing the consumer, one facing the sales counter. The FPGA typically converts the single DSI input to one DSI and one eDP output, with image processing to rescale the output and adjust the frame rate (see Figure 1) VR/AR headsets and goggles, splitting and converting a DisplayPort-over-USB Type-C® input from a host device such as a PC or smartphone to separate MIPI outputs to a left and right display in the headset Industrial machine vision systems, converting an image sensor’s MIPI D-PHY or C-PHY input to a high-speed USB 3.0 output to a host computer. Fig. 1: using the GW5AT-15 FPGA, a single MIPI DSI video input from an external SoC can be converted to feed two displays requiring one MIPI output and one eDP output Higher-speed SerDes at lower power and cost In all these use cases, an FPGA can provide the raw SerDes throughput for one or multiple display screens or image sensors, while enabling changes in the input or output specifications to be made just by changing the VHDL or Verilog programming of the device. The question the consumer and industrial markets are asking is, how far can power consumption, size and cost be reduced while providing the high SerDes bandwidth these applications require? GOWIN has provided a new answer to the question by combining application-specific optimizations at both the silicon and circuit design level in a way that no low-density FPGA has ever before attempted. In silicon, scaling provides PPAC benefits (power, performance, area and cost) for low-end FPGAs as much as for other semiconductors. In the past, however, low-density FPGAs have tended not to take advantage of more advanced process nodes – FGPA manufacturers have preferred to extend the life of IP developed for legacy processes. But high-speed video bridging places extreme demands on the FPGA. That is why for its Arora® V products, GOWIN shifted production from the 55nm process used in its Arora II products to TSMC’s ultra-low power 22nm process. Use of this process has enabled GOWIN to gain performance, power and cost benefits in low-density Arora V products such as the GW5AT-15, available in a compact 4.9mm x 5.3mm WLCSP package. Despite its small size, this FPGA combines various hard-core SerDes transceivers offering maximum SerDes throughput of 12.5Gbps, together with 15,120 logic elements alongside high-speed memory resources including: 118kb of shadow SRAM 630kb of block SRAM (BSRAM) arranged as 35 x 18kb Optional 64Mb (in MG132P package) or 128Mb (in CM90P package) of pseudo SRAM (pSRAM) Optional 8Mb of NOR Flash By limiting the programmable logic provision to 15,120 logic elements, GOWIN can produce a smaller die at a lower unit cost, while providing sufficient digital capability to perform important image processing functions such as frame scaling and frame rate adaptation. The application-specific circuit design optimizations in the Arora V family provide the higher SerDes throughput required for instance by the gamers viewing 4K content at 160 frames/s on a tablet. For instance, the GW5AT-15 features hardcore implementations of important SerDes interfaces: Three-lane MIPI C-PHY (5.7Gbps/lane) Four-lane MIPI D-PHY (2.5Gbps/lane) x4 PCIe 2.0 Alongside these circuit features, the GW5AT-15 includes various built-in softcore interfaces suitable for video bridging applications: a USB 2.0 PHY, USB 3.0 PHY, PCIe 3.0, and up to four lanes of 12.5Gbps/lane SerDes suitable for DisplayPort, eDP, SLVS-EC, LVDS and other types of video traffic. These capabilities are what is required for the gaming tablet rendering 4K video at a high frame rate, converting a typical SoC’s MIPI output to a tablet display’s eDP input (see Figure 2). Fig. 2: conversion of video data from MIPI to eDP format in a gaming tablet requires high SerDes throughput The implementation of fast video bridging and image processing is as important when interfacing to a camera as when rendering video on a display. In industrial machine vision systems, for instance, a GOWIN GW5AT-15 or -60 can connect to a camera’s MIPI D-PHY or C-PHY interface and bridge the video to a host PC’s high-speed USB Type-C interface (see Figure 3). The FPGA’s softcore USB 3.0 PHY and USB 3.0 controller enables a single-chip implementation that can interface directly to the host controller without an external USB 3.0 PHY. This solution has an extremely small footprint which can be integrated into the camera enclosure. The GW5AT-60, which offers 59,950 logic elements, provides sufficient resources to support image preprocessing and machine vision-related algorithms. It also provides high-speed four-channel SerDes transceivers, hardcore MIPI C-PHY and D-PHY interfaces, and softcore LVDS interfaces to support a wide variety of sensors. Fig. 3: in an industrial machine vision system, use of an Arora V FPGA enables the USB 3.0 interface to a host PC to be integrated into the camera enclosure A new direction for the low-density FPGA The optimization of an FPGA product for video bridging and image processing applications points this segment of the low-density FPGA market in a new direction: in pursuit of greater size, power and cost reduction, FPGA products are evolving to include more application-specific SerDes functionality hard-wired into small devices. And where previously FPGAs achieved low cost by maintaining older, legacy silicon fabrication processes, a new generation of low-density FPGAs are using advanced processes to provide the valuable advantages of low power and small footprint while reducing cost by limiting the provision of logic elements that are not required in the target applications. This brings the FPGA to center stage in the consumer device market, enabling a new generation of devices to benefit from improved display and camera performance without sacrificing battery power or competitive cost.

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