Synthesis Messages

Report Title GowinSynthesis Report
Design File D:\Gowin\Gowin_V1.9.11.01_x64\IDE\ipcore\USB_DEVICE_CONTROLLER\data\usb_device_controller_top.v
D:\Gowin\Gowin_V1.9.11.01_x64\IDE\ipcore\USB_DEVICE_CONTROLLER\data\usb_device_controller.v
GowinSynthesis Constraints File ---
Tool Version V1.9.11.01 (64-bit)
Part Number GW5AT-LV60UG225C2/I1
Device GW5AT-60
Device Version B
Created Time Wed Mar 5 15:29:37 2025
Legal Announcement Copyright (C)2014-2025 Gowin Semiconductor Corporation. ALL rights reserved.

Synthesis Details

Top Level Module USB_Device_Controller_Top
Synthesis Process Running parser:
    CPU time = 0h 0m 0.234s, Elapsed time = 0h 0m 0.24s, Peak memory usage = 118.457MB
Running netlist conversion:
    CPU time = 0h 0m 0.015s, Elapsed time = 0h 0m 0.013s, Peak memory usage = 118.457MB
Running device independent optimization:
    Optimizing Phase 0: CPU time = 0h 0m 0.062s, Elapsed time = 0h 0m 0.068s, Peak memory usage = 118.457MB
    Optimizing Phase 1: CPU time = 0h 0m 0.031s, Elapsed time = 0h 0m 0.033s, Peak memory usage = 118.457MB
    Optimizing Phase 2: CPU time = 0h 0m 0.078s, Elapsed time = 0h 0m 0.076s, Peak memory usage = 118.457MB
Running inference:
    Inferring Phase 0: CPU time = 0h 0m 0.015s, Elapsed time = 0h 0m 0.016s, Peak memory usage = 118.457MB
    Inferring Phase 1: CPU time = 0h 0m 0.015s, Elapsed time = 0h 0m 0.02s, Peak memory usage = 118.457MB
    Inferring Phase 2: CPU time = 0h 0m 0.015s, Elapsed time = 0h 0m 0.007s, Peak memory usage = 118.457MB
    Inferring Phase 3: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.002s, Peak memory usage = 118.457MB
Running technical mapping:
    Tech-Mapping Phase 0: CPU time = 0h 0m 0.062s, Elapsed time = 0h 0m 0.066s, Peak memory usage = 118.457MB
    Tech-Mapping Phase 1: CPU time = 0h 0m 0.046s, Elapsed time = 0h 0m 0.034s, Peak memory usage = 118.457MB
    Tech-Mapping Phase 2: CPU time = 0h 0m 0.015s, Elapsed time = 0h 0m 0.014s, Peak memory usage = 118.457MB
    Tech-Mapping Phase 3: CPU time = 0h 0m 6s, Elapsed time = 0h 0m 6s, Peak memory usage = 145.055MB
    Tech-Mapping Phase 4: CPU time = 0h 0m 0.093s, Elapsed time = 0h 0m 0.134s, Peak memory usage = 145.055MB
Generate output files:
    CPU time = 0h 0m 0.062s, Elapsed time = 0h 0m 0.078s, Peak memory usage = 145.055MB
Total Time and Memory Usage CPU time = 0h 0m 6s, Elapsed time = 0h 0m 6s, Peak memory usage = 145.055MB

Resource

Resource Usage Summary

Resource Usage
I/O Port 468
I/O Buf 464
    IBUF 376
    OBUF 88
Register 497
    DFFSE 38
    DFFRE 390
    DFFCE 69
LUT 1540
    LUT2 169
    LUT3 467
    LUT4 904
ALU 113
    ALU 113
INV 31
    INV 31

Resource Utilization Summary

Resource Usage Utilization
Logic 1684(1571 LUT, 113 ALU) / 59904 3%
Register 497 / 60231 <1%
  --Register as Latch 0 / 60231 0%
  --Register as FF 497 / 60231 <1%
BSRAM 0 / 118 0%

Timing

Clock Summary:

NO. Clock Name Type Period Frequency(MHz) Rise Fall Source Master Object
1 clk_i Base 10.000 100.000 0.000 5.000 clk_i_ibuf/I

Max Frequency Summary:

NO. Clock Name Constraint Actual Fmax Logic Level Entity
1 clk_i 100.000(MHz) 124.363(MHz) 13 TOP

Detail Timing Paths Information

Path 1

Path Summary:
Slack 1.959
Data Arrival Time 8.290
Data Required Time 10.249
From u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_desctyp_2_s0
To u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_state_9_s2
Launch Clk clk_i[R]
Latch Clk clk_i[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 clk_i
0.000 0.000 tCL RR 1 clk_i_ibuf/I
0.000 0.000 tINS RR 497 clk_i_ibuf/O
0.300 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_desctyp_2_s0/CLK
0.606 0.306 tC2Q RR 24 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_desctyp_2_s0/Q
0.906 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s18/I0
1.327 0.421 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s18/F
1.627 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s13/I2
1.996 0.369 tINS RR 18 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s13/F
2.296 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s14/I1
2.709 0.413 tINS RR 32 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s14/F
3.009 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usbc_dsclen_2_s11/I0
3.430 0.421 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usbc_dsclen_2_s11/F
3.730 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usbc_dsclen_2_s8/I2
4.099 0.369 tINS RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usbc_dsclen_2_s8/F
4.399 0.300 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1411_s0/I1
4.849 0.450 tINS RF 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1411_s0/COUT
4.849 0.000 tNET FF 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1412_s0/CIN
4.889 0.040 tINS FR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1412_s0/COUT
4.889 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1413_s0/CIN
4.929 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1413_s0/COUT
4.929 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1414_s0/CIN
4.969 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1414_s0/COUT
4.969 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1415_s0/CIN
5.009 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1415_s0/COUT
5.009 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1416_s0/CIN
5.049 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1416_s0/COUT
5.049 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1417_s0/CIN
5.089 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1417_s0/COUT
5.089 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1418_s0/CIN
5.129 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1418_s0/COUT
5.129 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1419_s0/CIN
5.169 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1419_s0/COUT
5.169 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1420_s0/CIN
5.209 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1420_s0/COUT
5.209 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1421_s0/CIN
5.249 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1421_s0/COUT
5.249 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1422_s0/CIN
5.289 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1422_s0/COUT
5.289 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1423_s0/CIN
5.329 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1423_s0/COUT
5.329 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1424_s0/CIN
5.369 0.040 tINS RR 5 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1424_s0/COUT
5.669 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1688_s38/I3
5.879 0.210 tINS RR 4 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1688_s38/F
6.179 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1686_s46/I0
6.600 0.421 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1686_s46/F
6.900 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1686_s40/I0
7.321 0.421 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1686_s40/F
7.621 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1686_s37/I2
7.990 0.369 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1686_s37/F
8.290 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_state_9_s2/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
10.000 0.000 clk_i
10.000 0.000 tCL RR 1 clk_i_ibuf/I
10.000 0.000 tINS RR 497 clk_i_ibuf/O
10.300 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_state_9_s2/CLK
10.249 -0.051 tSu 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_state_9_s2
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 10.000
Logic Level: 13
Arrival Clock Path Delay: cell: 0.000, 0.000%; route: 0.300, 100.000%
Arrival Data Path Delay: cell: 4.384, 54.868%; route: 3.300, 41.302%; tC2Q: 0.306, 3.830%
Required Clock Path Delay: cell: 0.000, 0.000%; route: 0.300, 100.000%

Path 2

Path Summary:
Slack 2.628
Data Arrival Time 7.621
Data Required Time 10.249
From u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_desctyp_2_s0
To u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_answerptr_2_s0
Launch Clk clk_i[R]
Latch Clk clk_i[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 clk_i
0.000 0.000 tCL RR 1 clk_i_ibuf/I
0.000 0.000 tINS RR 497 clk_i_ibuf/O
0.300 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_desctyp_2_s0/CLK
0.606 0.306 tC2Q RR 24 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_desctyp_2_s0/Q
0.906 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s18/I0
1.327 0.421 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s18/F
1.627 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s13/I2
1.996 0.369 tINS RR 18 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s13/F
2.296 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s14/I1
2.709 0.413 tINS RR 32 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s14/F
3.009 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usbc_dsclen_2_s11/I0
3.430 0.421 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usbc_dsclen_2_s11/F
3.730 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usbc_dsclen_2_s8/I2
4.099 0.369 tINS RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usbc_dsclen_2_s8/F
4.399 0.300 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1411_s0/I1
4.849 0.450 tINS RF 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1411_s0/COUT
4.849 0.000 tNET FF 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1412_s0/CIN
4.889 0.040 tINS FR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1412_s0/COUT
4.889 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1413_s0/CIN
4.929 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1413_s0/COUT
4.929 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1414_s0/CIN
4.969 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1414_s0/COUT
4.969 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1415_s0/CIN
5.009 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1415_s0/COUT
5.009 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1416_s0/CIN
5.049 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1416_s0/COUT
5.049 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1417_s0/CIN
5.089 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1417_s0/COUT
5.089 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1418_s0/CIN
5.129 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1418_s0/COUT
5.129 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1419_s0/CIN
5.169 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1419_s0/COUT
5.169 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1420_s0/CIN
5.209 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1420_s0/COUT
5.209 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1421_s0/CIN
5.249 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1421_s0/COUT
5.249 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1422_s0/CIN
5.289 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1422_s0/COUT
5.289 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1423_s0/CIN
5.329 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1423_s0/COUT
5.329 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1424_s0/CIN
5.369 0.040 tINS RR 5 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1424_s0/COUT
5.669 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1688_s38/I3
5.879 0.210 tINS RR 4 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1688_s38/F
6.179 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1663_s12/I0
6.600 0.421 tINS RR 4 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1663_s12/F
6.900 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1672_s11/I0
7.321 0.421 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1672_s11/F
7.621 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_answerptr_2_s0/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
10.000 0.000 clk_i
10.000 0.000 tCL RR 1 clk_i_ibuf/I
10.000 0.000 tINS RR 497 clk_i_ibuf/O
10.300 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_answerptr_2_s0/CLK
10.249 -0.051 tSu 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_answerptr_2_s0
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 10.000
Logic Level: 12
Arrival Clock Path Delay: cell: 0.000, 0.000%; route: 0.300, 100.000%
Arrival Data Path Delay: cell: 4.015, 54.842%; route: 3.000, 40.978%; tC2Q: 0.306, 4.180%
Required Clock Path Delay: cell: 0.000, 0.000%; route: 0.300, 100.000%

Path 3

Path Summary:
Slack 2.628
Data Arrival Time 7.621
Data Required Time 10.249
From u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_desctyp_2_s0
To u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_answerptr_4_s0
Launch Clk clk_i[R]
Latch Clk clk_i[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 clk_i
0.000 0.000 tCL RR 1 clk_i_ibuf/I
0.000 0.000 tINS RR 497 clk_i_ibuf/O
0.300 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_desctyp_2_s0/CLK
0.606 0.306 tC2Q RR 24 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_desctyp_2_s0/Q
0.906 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s18/I0
1.327 0.421 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s18/F
1.627 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s13/I2
1.996 0.369 tINS RR 18 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s13/F
2.296 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s14/I1
2.709 0.413 tINS RR 32 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s14/F
3.009 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usbc_dsclen_2_s11/I0
3.430 0.421 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usbc_dsclen_2_s11/F
3.730 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usbc_dsclen_2_s8/I2
4.099 0.369 tINS RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usbc_dsclen_2_s8/F
4.399 0.300 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1411_s0/I1
4.849 0.450 tINS RF 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1411_s0/COUT
4.849 0.000 tNET FF 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1412_s0/CIN
4.889 0.040 tINS FR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1412_s0/COUT
4.889 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1413_s0/CIN
4.929 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1413_s0/COUT
4.929 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1414_s0/CIN
4.969 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1414_s0/COUT
4.969 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1415_s0/CIN
5.009 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1415_s0/COUT
5.009 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1416_s0/CIN
5.049 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1416_s0/COUT
5.049 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1417_s0/CIN
5.089 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1417_s0/COUT
5.089 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1418_s0/CIN
5.129 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1418_s0/COUT
5.129 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1419_s0/CIN
5.169 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1419_s0/COUT
5.169 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1420_s0/CIN
5.209 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1420_s0/COUT
5.209 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1421_s0/CIN
5.249 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1421_s0/COUT
5.249 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1422_s0/CIN
5.289 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1422_s0/COUT
5.289 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1423_s0/CIN
5.329 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1423_s0/COUT
5.329 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1424_s0/CIN
5.369 0.040 tINS RR 5 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1424_s0/COUT
5.669 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1688_s38/I3
5.879 0.210 tINS RR 4 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1688_s38/F
6.179 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1663_s12/I0
6.600 0.421 tINS RR 4 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1663_s12/F
6.900 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1666_s11/I0
7.321 0.421 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1666_s11/F
7.621 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_answerptr_4_s0/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
10.000 0.000 clk_i
10.000 0.000 tCL RR 1 clk_i_ibuf/I
10.000 0.000 tINS RR 497 clk_i_ibuf/O
10.300 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_answerptr_4_s0/CLK
10.249 -0.051 tSu 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_answerptr_4_s0
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 10.000
Logic Level: 12
Arrival Clock Path Delay: cell: 0.000, 0.000%; route: 0.300, 100.000%
Arrival Data Path Delay: cell: 4.015, 54.842%; route: 3.000, 40.978%; tC2Q: 0.306, 4.180%
Required Clock Path Delay: cell: 0.000, 0.000%; route: 0.300, 100.000%

Path 4

Path Summary:
Slack 2.628
Data Arrival Time 7.621
Data Required Time 10.249
From u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_desctyp_2_s0
To u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_answerptr_5_s0
Launch Clk clk_i[R]
Latch Clk clk_i[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 clk_i
0.000 0.000 tCL RR 1 clk_i_ibuf/I
0.000 0.000 tINS RR 497 clk_i_ibuf/O
0.300 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_desctyp_2_s0/CLK
0.606 0.306 tC2Q RR 24 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_desctyp_2_s0/Q
0.906 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s18/I0
1.327 0.421 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s18/F
1.627 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s13/I2
1.996 0.369 tINS RR 18 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s13/F
2.296 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s14/I1
2.709 0.413 tINS RR 32 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s14/F
3.009 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usbc_dsclen_2_s11/I0
3.430 0.421 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usbc_dsclen_2_s11/F
3.730 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usbc_dsclen_2_s8/I2
4.099 0.369 tINS RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usbc_dsclen_2_s8/F
4.399 0.300 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1411_s0/I1
4.849 0.450 tINS RF 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1411_s0/COUT
4.849 0.000 tNET FF 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1412_s0/CIN
4.889 0.040 tINS FR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1412_s0/COUT
4.889 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1413_s0/CIN
4.929 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1413_s0/COUT
4.929 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1414_s0/CIN
4.969 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1414_s0/COUT
4.969 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1415_s0/CIN
5.009 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1415_s0/COUT
5.009 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1416_s0/CIN
5.049 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1416_s0/COUT
5.049 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1417_s0/CIN
5.089 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1417_s0/COUT
5.089 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1418_s0/CIN
5.129 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1418_s0/COUT
5.129 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1419_s0/CIN
5.169 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1419_s0/COUT
5.169 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1420_s0/CIN
5.209 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1420_s0/COUT
5.209 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1421_s0/CIN
5.249 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1421_s0/COUT
5.249 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1422_s0/CIN
5.289 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1422_s0/COUT
5.289 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1423_s0/CIN
5.329 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1423_s0/COUT
5.329 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1424_s0/CIN
5.369 0.040 tINS RR 5 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1424_s0/COUT
5.669 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1688_s38/I3
5.879 0.210 tINS RR 4 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1688_s38/F
6.179 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1663_s12/I0
6.600 0.421 tINS RR 4 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1663_s12/F
6.900 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1663_s11/I0
7.321 0.421 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1663_s11/F
7.621 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_answerptr_5_s0/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
10.000 0.000 clk_i
10.000 0.000 tCL RR 1 clk_i_ibuf/I
10.000 0.000 tINS RR 497 clk_i_ibuf/O
10.300 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_answerptr_5_s0/CLK
10.249 -0.051 tSu 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_answerptr_5_s0
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 10.000
Logic Level: 12
Arrival Clock Path Delay: cell: 0.000, 0.000%; route: 0.300, 100.000%
Arrival Data Path Delay: cell: 4.015, 54.842%; route: 3.000, 40.978%; tC2Q: 0.306, 4.180%
Required Clock Path Delay: cell: 0.000, 0.000%; route: 0.300, 100.000%

Path 5

Path Summary:
Slack 2.680
Data Arrival Time 7.569
Data Required Time 10.249
From u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_desctyp_2_s0
To u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_state_8_s4
Launch Clk clk_i[R]
Latch Clk clk_i[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 clk_i
0.000 0.000 tCL RR 1 clk_i_ibuf/I
0.000 0.000 tINS RR 497 clk_i_ibuf/O
0.300 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_desctyp_2_s0/CLK
0.606 0.306 tC2Q RR 24 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_desctyp_2_s0/Q
0.906 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s18/I0
1.327 0.421 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s18/F
1.627 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s13/I2
1.996 0.369 tINS RR 18 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s13/F
2.296 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s14/I1
2.709 0.413 tINS RR 32 u_usb_device_controller/u_usb_device_controller_utmi/descrom_start_14_s14/F
3.009 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usbc_dsclen_2_s11/I0
3.430 0.421 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usbc_dsclen_2_s11/F
3.730 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usbc_dsclen_2_s8/I2
4.099 0.369 tINS RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usbc_dsclen_2_s8/F
4.399 0.300 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1411_s0/I1
4.849 0.450 tINS RF 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1411_s0/COUT
4.849 0.000 tNET FF 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1412_s0/CIN
4.889 0.040 tINS FR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1412_s0/COUT
4.889 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1413_s0/CIN
4.929 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1413_s0/COUT
4.929 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1414_s0/CIN
4.969 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1414_s0/COUT
4.969 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1415_s0/CIN
5.009 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1415_s0/COUT
5.009 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1416_s0/CIN
5.049 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1416_s0/COUT
5.049 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1417_s0/CIN
5.089 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1417_s0/COUT
5.089 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1418_s0/CIN
5.129 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1418_s0/COUT
5.129 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1419_s0/CIN
5.169 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1419_s0/COUT
5.169 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1420_s0/CIN
5.209 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1420_s0/COUT
5.209 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1421_s0/CIN
5.249 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1421_s0/COUT
5.249 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1422_s0/CIN
5.289 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1422_s0/COUT
5.289 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1423_s0/CIN
5.329 0.040 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1423_s0/COUT
5.329 0.000 tNET RR 2 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1424_s0/CIN
5.369 0.040 tINS RR 5 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1424_s0/COUT
5.669 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1688_s38/I3
5.879 0.210 tINS RR 4 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1688_s38/F
6.179 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1688_s37/I0
6.600 0.421 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1688_s37/F
6.900 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1688_s35/I2
7.269 0.369 tINS RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/n1688_s35/F
7.569 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_state_8_s4/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
10.000 0.000 clk_i
10.000 0.000 tCL RR 1 clk_i_ibuf/I
10.000 0.000 tINS RR 497 clk_i_ibuf/O
10.300 0.300 tNET RR 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_state_8_s4/CLK
10.249 -0.051 tSu 1 u_usb_device_controller/u_usb_device_controller_utmi/usb_control_inst/s_state_8_s4
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 10.000
Logic Level: 12
Arrival Clock Path Delay: cell: 0.000, 0.000%; route: 0.300, 100.000%
Arrival Data Path Delay: cell: 3.963, 54.519%; route: 3.000, 41.271%; tC2Q: 0.306, 4.210%
Required Clock Path Delay: cell: 0.000, 0.000%; route: 0.300, 100.000%