| Project Settings |
|---|
| Project Name | IIR_Filter | Device Name | rev_1: GOWIN-GW2A : GW2A_18 |
| Implementation Name | rev_1 | Top Module | [auto] |
| Pipelining | 1 | Retiming | 0 |
| Resource Sharing | 1 | Fanout Guide | 10000 |
| Disable I/O Insertion | 1 | Disable Sequential Optimizations | 0 |
| Clock Conversion | 1 | FSM Compiler | 1 |
| Run Status |
|---|
| Job Name |
Status |
|
|
|
CPU Time |
Real Time |
Memory |
Date/Time |
| (compiler) | Complete |
8 |
4 |
0 |
- |
00m:02s |
- |
18/12/20
11:23 |
| (premap) | Complete |
5 |
2 |
0 |
0m:02s |
0m:03s |
337MB |
18/12/20
11:23 |
| (fpga_mapper) | Complete |
24 |
5 |
0 |
0m:14s |
0m:16s |
363MB |
18/12/20
11:23 |
| Multi-srs Generator |
Complete | | | | 00m:01s | | | 18/12/20
11:23 |
| Area Summary |
|---|
|
| Non I/O Register bits
(non_io_reg) | 1298 (8%) |
I/O Register bits
(total_io_reg) | 0 |
| Ultra Rams | 0 |
Block Rams
(v_ram) | 2 (46) |
| Block Multipliers
(dsp_used) | 2 (24) |
LUTs
(total_luts) | 1083 (5%) |
| Timing Summary |
|---|
|
| Clock Name | Req Freq | Est Freq | Slack |
|---|
| IIR_Filter_Top|clk | 162.3 MHz | 138.0 MHz | -1.087 |
| System | 150.0 MHz | 260.0 MHz | 2.821 |
| Optimizations Summary |
|---|
| Combined Clock Conversion | 1 / 0 |
| |
| Optimizations Summary |
|---|
| Retiming | 0 / 2 |
| |
|