Power Messages
| Report Title | Power Analysis Report |
| Design File | E:\work\work\Confidential_IP\code\TDC\Gowin_TDC_RefDesign\project\impl\gwsynthesis\fpga_project.vg |
| Physical Constraints File | E:\work\work\Confidential_IP\code\TDC\Gowin_TDC_RefDesign\project\src\fpga_project.cst |
| Timing Constraints File | --- |
| Tool Version | V1.9.11.02 (64-bit) |
| Part Number | GW1N-LV9QN88C6/I5 |
| Device | GW1N-9 |
| Device Version | C |
| Created Time | Mon Jul 14 10:07:12 2025 |
| Legal Announcement | Copyright (C)2014-2025 Gowin Semiconductor Corporation. All rights reserved. |
Configure Information:
| Grade | Commercial |
| Process | Typical |
| Ambient Temperature | 25.000 |
| Use Custom Theta JA | false |
| Heat Sink | None |
| Air Flow | LFM_0 |
| Use Custom Theta SA | false |
| Board Thermal Model | None |
| Use Custom Theta JB | false |
| Related Vcd File | |
| Related Saif File | |
| Filter Glitches | false |
| Default IO Toggle Rate | 0.125 |
| Default Remain Toggle Rate | 0.125 |
Power Summary
Power Information:
| Total Power (mW) | 25.918 |
| Quiescent Power (mW) | 9.546 |
| Dynamic Power (mW) | 16.372 |
Thermal Information:
| Junction Temperature | 25.837 |
| Theta JA | 32.620 |
| Max Allowed Ambient Temperature | 84.163 |
Supply Information:
| Voltage Source | Voltage | Dynamic Current(mA) | Quiescent Current(mA) | Power(mW) |
|---|---|---|---|---|
| VCC | 1.200 | 11.723 | 2.405 | 16.954 |
| VCCX | 3.300 | 0.349 | 1.300 | 5.442 |
| VCCIO33 | 3.300 | 0.349 | 0.718 | 3.522 |
Power Details
Power By Block Type:
| Block Type | Total Power(mW) | Static Power(mW) | Average Toggle Rate(millions of transitions/sec) |
|---|---|---|---|
| Logic | 0.089 | NA | 5.015 |
| IO | 5.847 | 3.123 | 12.250 |
| BSRAM | 2.390 | NA | NA |
| PLL | 11.158 | NA | NA |
Power By Hierarchy:
| Hierarchy Entity | Total Power(mW) | Block Dynamic Power(mW) |
|---|---|---|
| top | 13.637 | 13.637(13.637) |
| top/Gowin_PLL/ | 11.158 | 11.158(0.000) |
| top/dut/ | 0.022 | 0.022(0.022) |
| top/dut/u_tdc/ | 0.022 | 0.022(0.000) |
| top/gw_gao_gvio_inst_0/ | 2.457 | 2.457(2.457) |
| top/gw_gao_gvio_inst_0/u_gvio0_top/ | 0.009 | 0.009(0.000) |
| top/gw_gao_gvio_inst_0/u_gvio_icon_top/ | 0.002 | 0.002(0.000) |
| top/gw_gao_gvio_inst_0/u_icon_top/ | 0.001 | 0.001(0.000) |
| top/gw_gao_gvio_inst_0/u_la0_top/ | 2.446 | 2.446(2.413) |
| top/gw_gao_gvio_inst_0/u_la0_top/u_ao_crc32/ | 0.003 | 0.003(0.000) |
| top/gw_gao_gvio_inst_0/u_la0_top/u_ao_match_0/ | 0.001 | 0.001(0.000) |
| top/gw_gao_gvio_inst_0/u_la0_top/u_ao_mem_ctrl/ | 2.409 | 2.409(0.000) |
Power By Clock Domain:
| Clock Domain | Clock Frequency(Mhz) | Total Dynamic Power(mW) |
|---|---|---|
| tck_pad_i | 20.000 | 0.432 |
| u_CLKDIV/CLKOUT.default_gen_clk | 100.000 | 2.051 |
| Gowin_PLL/rpll_inst/CLKOUT.default_gen_clk | 400.000 | 0.007 |
| clk | 50.000 | 11.158 |