| Project Settings |
|---|
| Project Name | ASRC | Device Name | rev_1: GOWIN-GW2A : GW2A_18 |
| Implementation Name | rev_1 | Top Module | [auto] |
| Pipelining | 1 | Retiming | 0 |
| Resource Sharing | 1 | Fanout Guide | 10000 |
| Disable I/O Insertion | 0 | Disable Sequential Optimizations | 0 |
| Clock Conversion | 1 | FSM Compiler | 1 |
| Run Status |
|---|
| Job Name |
Status |
|
|
|
CPU Time |
Real Time |
Memory |
Date/Time |
| (compiler) | out-of-date |
50 |
36 |
0 |
- |
00m:10s |
- |
5/18/2020
10:53:10 PM |
| (premap) | Complete |
15 |
4 |
0 |
0m:19s |
0m:16s |
237MB |
5/18/2020
10:53:29 PM |
| (fpga_mapper) | Complete |
25 |
20 |
0 |
01m:13s |
01m:17s |
266MB |
5/18/2020
10:54:47 PM |
| Area Summary |
|---|
|
| I/O ports
(io_port) | 99 |
Non I/O Register bits
(non_io_reg) | 1877 (12%) |
| I/O Register bits
(total_io_reg) | 0 |
Ultra Rams | 0 |
| Block Rams
(v_ram) | 10 (46) |
Block Multipliers
(dsp_used) | 6 (24) |
| LUTs
(total_luts) | 2241 (10%) |
| |
| Timing Summary |
|---|
|
| Clock Name | Req Freq | Est Freq | Slack |
|---|
| gw2a18|SW[1] | 150.0 MHz | NA | NA |
| gw2a18|SYM_CLK | 107.7 MHz | 91.5 MHz | -1.639 |
| System | 150.0 MHz | 403.9 MHz | 4.191 |
| Optimizations Summary |
|---|
| Combined Clock Conversion | 2 / 0 |
| |
|