Synthesis Messages

Report Title GowinSynthesis Report
Design File C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v
C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\test_top.v
C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v
C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\data_prom\data_prom.v
GowinSynthesis Constraints File ---
GowinSynthesis Verision GowinSynthesis V1.9.5.02Beta
Created Time Wed May 20 19:10:21 2020
Legal Announcement Copyright (C)2014-2020 Gowin Semiconductor Corporation. ALL rights reserved.

Design Settings

Top Level Module: gw2a18
Part Number: GW2A-LV18PG256C8/I7

Resource

Resource Usage Summary

I/OPORT Usage: 99
I/OBUF Usage: 33
    IBUF 3
    OBUF 26
    TBUF 4
REG Usage: 1806
    DFFE 4
    DFFP 9
    DFFPE 32
    DFFC 1
    DFFCE 1734
    DL 26
LUT Usage: 2340
    LUT2 586
    LUT3 593
    LUT4 1161
ALU Usage: 683
    ALU 683
INV Usage: 7
    INV 7
DSP Usage: 3
    MULT36X36 3
BSRAM Usage: 10
    SP 1
    SDPB 4
    pROM 5

Resource Utilization Summary

Target Device: GW2A-18-PBGA256
CFU Logics 3030(2347 LUTs, 683 ALUs) / 20736 15%
Registers 1806 / 16173 11%
BSRAMs 10 / 46 22%
DSP Macros 6 / (12*2) 25%


Timing

Clock Summary:

Clock Type Frequency Period Rise Fall Source Master Object
DEFAULT_CLK Base 100.0 MHz 10.000 0.000 5.000

Timing Report:

Top View: gw2a18
Requested Frequency: 100.0 MHz
Paths Requested: 5
Constraint File(ignored):
All time values displayed in nanoseconds(ns).

Performance Summary:

Worst Slack in Design: 2.420
Start Clock Slack Requested Frequency Estimated Frequency Requested Period Estimated Period Clock Type
DEFAULT_CLK 2.420 100.0 MHz 131.9 MHz 10.000 7.580 Base

Detail Timing Paths Information

Path information for path number 1 : 
Clock Skew: 0.062
Setup Relationship: 5.000
Slack(critical): 2.236
Data Arrival Time: 3.453
Data Required Time: 5.690
Number of Logic Level: 5
Starting Point: test_top/asrc/asrc/ratio_dect/err_mag_vari_0_ins11352
Ending Point: test_top/asrc/asrc/ratio_dect/ratio_vari_25_ins13532
The Start Point Is Clocked By: DEFAULT_CLK[falling]
The End Point Is Clocked By: DEFAULT_CLK[rising]


Instance/Net Name Type Pin Name Pin Dir Delay Arrival Time Fanout
SYM_CLK_ibuf5427 IBUF I In - 0.000 -
SYM_CLK_ibuf5427 IBUF O Out 0.683 0.683 -
SYM_CLK Net - - 0.180 - 1797
\test_top/asrc/asrc/ratio_dect/err_mag_vari_0_ins11352 DFFCE CLK In - 0.863 -
\test_top/asrc/asrc/ratio_dect/err_mag_vari_0_ins11352 DFFCE Q Out 0.232 1.095 -
test_top_asrc_asrc_ratio_dect_err_mag_vari[0] Net - - 0.237 - 1
\test_top/asrc/asrc/ratio_dect/n1148_ins15362 ALU I1 In - 1.332 -
\test_top/asrc/asrc/ratio_dect/n1148_ins15362 ALU COUT Out 0.570 1.901 -
test_top_asrc_asrc_ratio_dect_n1148_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1147_ins15363 ALU CIN In - 1.901 -
\test_top/asrc/asrc/ratio_dect/n1147_ins15363 ALU COUT Out 0.035 1.937 -
test_top_asrc_asrc_ratio_dect_n1147_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1146_ins15364 ALU CIN In - 1.937 -
\test_top/asrc/asrc/ratio_dect/n1146_ins15364 ALU COUT Out 0.035 1.972 -
test_top_asrc_asrc_ratio_dect_n1146_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1145_ins15365 ALU CIN In - 1.972 -
\test_top/asrc/asrc/ratio_dect/n1145_ins15365 ALU COUT Out 0.035 2.007 -
test_top_asrc_asrc_ratio_dect_n1145_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1144_ins15366 ALU CIN In - 2.007 -
\test_top/asrc/asrc/ratio_dect/n1144_ins15366 ALU COUT Out 0.035 2.042 -
test_top_asrc_asrc_ratio_dect_n1144_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1143_ins15367 ALU CIN In - 2.042 -
\test_top/asrc/asrc/ratio_dect/n1143_ins15367 ALU COUT Out 0.035 2.078 -
test_top_asrc_asrc_ratio_dect_n1143_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1142_ins15368 ALU CIN In - 2.078 -
\test_top/asrc/asrc/ratio_dect/n1142_ins15368 ALU COUT Out 0.035 2.113 -
test_top_asrc_asrc_ratio_dect_n1142_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1141_ins15369 ALU CIN In - 2.113 -
\test_top/asrc/asrc/ratio_dect/n1141_ins15369 ALU COUT Out 0.035 2.148 -
test_top_asrc_asrc_ratio_dect_n1141_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1140_ins15370 ALU CIN In - 2.148 -
\test_top/asrc/asrc/ratio_dect/n1140_ins15370 ALU COUT Out 0.035 2.183 -
test_top_asrc_asrc_ratio_dect_n1140_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1139_ins15371 ALU CIN In - 2.183 -
\test_top/asrc/asrc/ratio_dect/n1139_ins15371 ALU COUT Out 0.035 2.218 -
test_top_asrc_asrc_ratio_dect_n1139_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1138_ins15372 ALU CIN In - 2.218 -
\test_top/asrc/asrc/ratio_dect/n1138_ins15372 ALU COUT Out 0.035 2.254 -
test_top_asrc_asrc_ratio_dect_n1138_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1137_ins15373 ALU CIN In - 2.254 -
\test_top/asrc/asrc/ratio_dect/n1137_ins15373 ALU COUT Out 0.035 2.289 -
test_top_asrc_asrc_ratio_dect_n1137_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1136_ins15374 ALU CIN In - 2.289 -
\test_top/asrc/asrc/ratio_dect/n1136_ins15374 ALU COUT Out 0.035 2.324 -
test_top_asrc_asrc_ratio_dect_n1136_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1135_ins15375 ALU CIN In - 2.324 -
\test_top/asrc/asrc/ratio_dect/n1135_ins15375 ALU COUT Out 0.035 2.359 -
test_top_asrc_asrc_ratio_dect_n1135_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1134_ins15376 ALU CIN In - 2.359 -
\test_top/asrc/asrc/ratio_dect/n1134_ins15376 ALU COUT Out 0.035 2.394 -
test_top_asrc_asrc_ratio_dect_n1134_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1133_ins15377 ALU CIN In - 2.394 -
\test_top/asrc/asrc/ratio_dect/n1133_ins15377 ALU COUT Out 0.035 2.430 -
test_top_asrc_asrc_ratio_dect_n1133_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1132_ins15378 ALU CIN In - 2.430 -
\test_top/asrc/asrc/ratio_dect/n1132_ins15378 ALU COUT Out 0.035 2.465 -
test_top_asrc_asrc_ratio_dect_n1132_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1131_ins15379 ALU CIN In - 2.465 -
\test_top/asrc/asrc/ratio_dect/n1131_ins15379 ALU COUT Out 0.035 2.500 -
test_top_asrc_asrc_ratio_dect_n1131_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1130_ins15380 ALU CIN In - 2.500 -
\test_top/asrc/asrc/ratio_dect/n1130_ins15380 ALU COUT Out 0.035 2.535 -
test_top_asrc_asrc_ratio_dect_n1130_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1129_ins15381 ALU CIN In - 2.535 -
\test_top/asrc/asrc/ratio_dect/n1129_ins15381 ALU COUT Out 0.035 2.570 -
test_top_asrc_asrc_ratio_dect_n1129_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1128_ins15382 ALU CIN In - 2.570 -
\test_top/asrc/asrc/ratio_dect/n1128_ins15382 ALU COUT Out 0.035 2.606 -
test_top_asrc_asrc_ratio_dect_n1128_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1127_ins15383 ALU CIN In - 2.606 -
\test_top/asrc/asrc/ratio_dect/n1127_ins15383 ALU COUT Out 0.035 2.641 -
test_top_asrc_asrc_ratio_dect_n1127_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1126_ins15384 ALU CIN In - 2.641 -
\test_top/asrc/asrc/ratio_dect/n1126_ins15384 ALU COUT Out 0.035 2.676 -
test_top_asrc_asrc_ratio_dect_n1126_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1125_ins15385 ALU CIN In - 2.676 -
\test_top/asrc/asrc/ratio_dect/n1125_ins15385 ALU COUT Out 0.035 2.711 -
test_top_asrc_asrc_ratio_dect_n1125_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1124_ins15386 ALU CIN In - 2.711 -
\test_top/asrc/asrc/ratio_dect/n1124_ins15386 ALU COUT Out 0.035 2.746 -
test_top_asrc_asrc_ratio_dect_n1124_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1123_ins15387 ALU CIN In - 2.746 -
\test_top/asrc/asrc/ratio_dect/n1123_ins15387 ALU SUM Out 0.470 3.216 -
test_top_asrc_asrc_ratio_dect_n1123 Net - - 0.237 - 1
\test_top/asrc/asrc/ratio_dect/ratio_vari_25_ins13532 DL D In - 3.453 -

Total Path Delay: 3.453
Logic Delay: 2.799(81.1%)
Route Delay: 0.654(18.9%)


Path information for path number 2 : 
Clock Skew: 0.124
Setup Relationship: 5.000
Slack(non-critical): 2.271
Data Arrival Time: 3.418
Data Required Time: 5.690
Number of Logic Level: 5
Starting Point: test_top/asrc/asrc/ratio_dect/err_mag_vari_0_ins11352
Ending Point: test_top/asrc/asrc/ratio_dect/ratio_vari_24_ins13533
The Start Point Is Clocked By: DEFAULT_CLK[falling]
The End Point Is Clocked By: DEFAULT_CLK[rising]


Instance/Net Name Type Pin Name Pin Dir Delay Arrival Time Fanout
SYM_CLK_ibuf5427 IBUF I In - 0.000 -
SYM_CLK_ibuf5427 IBUF O Out 0.683 0.683 -
SYM_CLK Net - - 0.180 - 1797
\test_top/asrc/asrc/ratio_dect/err_mag_vari_0_ins11352 DFFCE CLK In - 0.863 -
\test_top/asrc/asrc/ratio_dect/err_mag_vari_0_ins11352 DFFCE Q Out 0.232 1.095 -
test_top_asrc_asrc_ratio_dect_err_mag_vari[0] Net - - 0.237 - 1
\test_top/asrc/asrc/ratio_dect/n1148_ins15362 ALU I1 In - 1.332 -
\test_top/asrc/asrc/ratio_dect/n1148_ins15362 ALU COUT Out 0.570 1.901 -
test_top_asrc_asrc_ratio_dect_n1148_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1147_ins15363 ALU CIN In - 1.901 -
\test_top/asrc/asrc/ratio_dect/n1147_ins15363 ALU COUT Out 0.035 1.937 -
test_top_asrc_asrc_ratio_dect_n1147_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1146_ins15364 ALU CIN In - 1.937 -
\test_top/asrc/asrc/ratio_dect/n1146_ins15364 ALU COUT Out 0.035 1.972 -
test_top_asrc_asrc_ratio_dect_n1146_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1145_ins15365 ALU CIN In - 1.972 -
\test_top/asrc/asrc/ratio_dect/n1145_ins15365 ALU COUT Out 0.035 2.007 -
test_top_asrc_asrc_ratio_dect_n1145_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1144_ins15366 ALU CIN In - 2.007 -
\test_top/asrc/asrc/ratio_dect/n1144_ins15366 ALU COUT Out 0.035 2.042 -
test_top_asrc_asrc_ratio_dect_n1144_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1143_ins15367 ALU CIN In - 2.042 -
\test_top/asrc/asrc/ratio_dect/n1143_ins15367 ALU COUT Out 0.035 2.078 -
test_top_asrc_asrc_ratio_dect_n1143_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1142_ins15368 ALU CIN In - 2.078 -
\test_top/asrc/asrc/ratio_dect/n1142_ins15368 ALU COUT Out 0.035 2.113 -
test_top_asrc_asrc_ratio_dect_n1142_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1141_ins15369 ALU CIN In - 2.113 -
\test_top/asrc/asrc/ratio_dect/n1141_ins15369 ALU COUT Out 0.035 2.148 -
test_top_asrc_asrc_ratio_dect_n1141_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1140_ins15370 ALU CIN In - 2.148 -
\test_top/asrc/asrc/ratio_dect/n1140_ins15370 ALU COUT Out 0.035 2.183 -
test_top_asrc_asrc_ratio_dect_n1140_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1139_ins15371 ALU CIN In - 2.183 -
\test_top/asrc/asrc/ratio_dect/n1139_ins15371 ALU COUT Out 0.035 2.218 -
test_top_asrc_asrc_ratio_dect_n1139_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1138_ins15372 ALU CIN In - 2.218 -
\test_top/asrc/asrc/ratio_dect/n1138_ins15372 ALU COUT Out 0.035 2.254 -
test_top_asrc_asrc_ratio_dect_n1138_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1137_ins15373 ALU CIN In - 2.254 -
\test_top/asrc/asrc/ratio_dect/n1137_ins15373 ALU COUT Out 0.035 2.289 -
test_top_asrc_asrc_ratio_dect_n1137_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1136_ins15374 ALU CIN In - 2.289 -
\test_top/asrc/asrc/ratio_dect/n1136_ins15374 ALU COUT Out 0.035 2.324 -
test_top_asrc_asrc_ratio_dect_n1136_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1135_ins15375 ALU CIN In - 2.324 -
\test_top/asrc/asrc/ratio_dect/n1135_ins15375 ALU COUT Out 0.035 2.359 -
test_top_asrc_asrc_ratio_dect_n1135_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1134_ins15376 ALU CIN In - 2.359 -
\test_top/asrc/asrc/ratio_dect/n1134_ins15376 ALU COUT Out 0.035 2.394 -
test_top_asrc_asrc_ratio_dect_n1134_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1133_ins15377 ALU CIN In - 2.394 -
\test_top/asrc/asrc/ratio_dect/n1133_ins15377 ALU COUT Out 0.035 2.430 -
test_top_asrc_asrc_ratio_dect_n1133_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1132_ins15378 ALU CIN In - 2.430 -
\test_top/asrc/asrc/ratio_dect/n1132_ins15378 ALU COUT Out 0.035 2.465 -
test_top_asrc_asrc_ratio_dect_n1132_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1131_ins15379 ALU CIN In - 2.465 -
\test_top/asrc/asrc/ratio_dect/n1131_ins15379 ALU COUT Out 0.035 2.500 -
test_top_asrc_asrc_ratio_dect_n1131_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1130_ins15380 ALU CIN In - 2.500 -
\test_top/asrc/asrc/ratio_dect/n1130_ins15380 ALU COUT Out 0.035 2.535 -
test_top_asrc_asrc_ratio_dect_n1130_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1129_ins15381 ALU CIN In - 2.535 -
\test_top/asrc/asrc/ratio_dect/n1129_ins15381 ALU COUT Out 0.035 2.570 -
test_top_asrc_asrc_ratio_dect_n1129_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1128_ins15382 ALU CIN In - 2.570 -
\test_top/asrc/asrc/ratio_dect/n1128_ins15382 ALU COUT Out 0.035 2.606 -
test_top_asrc_asrc_ratio_dect_n1128_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1127_ins15383 ALU CIN In - 2.606 -
\test_top/asrc/asrc/ratio_dect/n1127_ins15383 ALU COUT Out 0.035 2.641 -
test_top_asrc_asrc_ratio_dect_n1127_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1126_ins15384 ALU CIN In - 2.641 -
\test_top/asrc/asrc/ratio_dect/n1126_ins15384 ALU COUT Out 0.035 2.676 -
test_top_asrc_asrc_ratio_dect_n1126_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1125_ins15385 ALU CIN In - 2.676 -
\test_top/asrc/asrc/ratio_dect/n1125_ins15385 ALU COUT Out 0.035 2.711 -
test_top_asrc_asrc_ratio_dect_n1125_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1124_ins15386 ALU CIN In - 2.711 -
\test_top/asrc/asrc/ratio_dect/n1124_ins15386 ALU SUM Out 0.470 3.181 -
test_top_asrc_asrc_ratio_dect_n1124 Net - - 0.237 - 1
\test_top/asrc/asrc/ratio_dect/ratio_vari_24_ins13533 DL D In - 3.418 -

Total Path Delay: 3.418
Logic Delay: 2.764(80.9%)
Route Delay: 0.654(19.1%)


Path information for path number 3 : 
Clock Skew: 0.186
Setup Relationship: 5.000
Slack(non-critical): 2.307
Data Arrival Time: 3.383
Data Required Time: 5.690
Number of Logic Level: 5
Starting Point: test_top/asrc/asrc/ratio_dect/err_mag_vari_0_ins11352
Ending Point: test_top/asrc/asrc/ratio_dect/ratio_vari_23_ins13534
The Start Point Is Clocked By: DEFAULT_CLK[falling]
The End Point Is Clocked By: DEFAULT_CLK[rising]


Instance/Net Name Type Pin Name Pin Dir Delay Arrival Time Fanout
SYM_CLK_ibuf5427 IBUF I In - 0.000 -
SYM_CLK_ibuf5427 IBUF O Out 0.683 0.683 -
SYM_CLK Net - - 0.180 - 1797
\test_top/asrc/asrc/ratio_dect/err_mag_vari_0_ins11352 DFFCE CLK In - 0.863 -
\test_top/asrc/asrc/ratio_dect/err_mag_vari_0_ins11352 DFFCE Q Out 0.232 1.095 -
test_top_asrc_asrc_ratio_dect_err_mag_vari[0] Net - - 0.237 - 1
\test_top/asrc/asrc/ratio_dect/n1148_ins15362 ALU I1 In - 1.332 -
\test_top/asrc/asrc/ratio_dect/n1148_ins15362 ALU COUT Out 0.570 1.901 -
test_top_asrc_asrc_ratio_dect_n1148_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1147_ins15363 ALU CIN In - 1.901 -
\test_top/asrc/asrc/ratio_dect/n1147_ins15363 ALU COUT Out 0.035 1.937 -
test_top_asrc_asrc_ratio_dect_n1147_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1146_ins15364 ALU CIN In - 1.937 -
\test_top/asrc/asrc/ratio_dect/n1146_ins15364 ALU COUT Out 0.035 1.972 -
test_top_asrc_asrc_ratio_dect_n1146_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1145_ins15365 ALU CIN In - 1.972 -
\test_top/asrc/asrc/ratio_dect/n1145_ins15365 ALU COUT Out 0.035 2.007 -
test_top_asrc_asrc_ratio_dect_n1145_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1144_ins15366 ALU CIN In - 2.007 -
\test_top/asrc/asrc/ratio_dect/n1144_ins15366 ALU COUT Out 0.035 2.042 -
test_top_asrc_asrc_ratio_dect_n1144_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1143_ins15367 ALU CIN In - 2.042 -
\test_top/asrc/asrc/ratio_dect/n1143_ins15367 ALU COUT Out 0.035 2.078 -
test_top_asrc_asrc_ratio_dect_n1143_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1142_ins15368 ALU CIN In - 2.078 -
\test_top/asrc/asrc/ratio_dect/n1142_ins15368 ALU COUT Out 0.035 2.113 -
test_top_asrc_asrc_ratio_dect_n1142_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1141_ins15369 ALU CIN In - 2.113 -
\test_top/asrc/asrc/ratio_dect/n1141_ins15369 ALU COUT Out 0.035 2.148 -
test_top_asrc_asrc_ratio_dect_n1141_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1140_ins15370 ALU CIN In - 2.148 -
\test_top/asrc/asrc/ratio_dect/n1140_ins15370 ALU COUT Out 0.035 2.183 -
test_top_asrc_asrc_ratio_dect_n1140_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1139_ins15371 ALU CIN In - 2.183 -
\test_top/asrc/asrc/ratio_dect/n1139_ins15371 ALU COUT Out 0.035 2.218 -
test_top_asrc_asrc_ratio_dect_n1139_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1138_ins15372 ALU CIN In - 2.218 -
\test_top/asrc/asrc/ratio_dect/n1138_ins15372 ALU COUT Out 0.035 2.254 -
test_top_asrc_asrc_ratio_dect_n1138_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1137_ins15373 ALU CIN In - 2.254 -
\test_top/asrc/asrc/ratio_dect/n1137_ins15373 ALU COUT Out 0.035 2.289 -
test_top_asrc_asrc_ratio_dect_n1137_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1136_ins15374 ALU CIN In - 2.289 -
\test_top/asrc/asrc/ratio_dect/n1136_ins15374 ALU COUT Out 0.035 2.324 -
test_top_asrc_asrc_ratio_dect_n1136_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1135_ins15375 ALU CIN In - 2.324 -
\test_top/asrc/asrc/ratio_dect/n1135_ins15375 ALU COUT Out 0.035 2.359 -
test_top_asrc_asrc_ratio_dect_n1135_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1134_ins15376 ALU CIN In - 2.359 -
\test_top/asrc/asrc/ratio_dect/n1134_ins15376 ALU COUT Out 0.035 2.394 -
test_top_asrc_asrc_ratio_dect_n1134_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1133_ins15377 ALU CIN In - 2.394 -
\test_top/asrc/asrc/ratio_dect/n1133_ins15377 ALU COUT Out 0.035 2.430 -
test_top_asrc_asrc_ratio_dect_n1133_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1132_ins15378 ALU CIN In - 2.430 -
\test_top/asrc/asrc/ratio_dect/n1132_ins15378 ALU COUT Out 0.035 2.465 -
test_top_asrc_asrc_ratio_dect_n1132_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1131_ins15379 ALU CIN In - 2.465 -
\test_top/asrc/asrc/ratio_dect/n1131_ins15379 ALU COUT Out 0.035 2.500 -
test_top_asrc_asrc_ratio_dect_n1131_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1130_ins15380 ALU CIN In - 2.500 -
\test_top/asrc/asrc/ratio_dect/n1130_ins15380 ALU COUT Out 0.035 2.535 -
test_top_asrc_asrc_ratio_dect_n1130_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1129_ins15381 ALU CIN In - 2.535 -
\test_top/asrc/asrc/ratio_dect/n1129_ins15381 ALU COUT Out 0.035 2.570 -
test_top_asrc_asrc_ratio_dect_n1129_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1128_ins15382 ALU CIN In - 2.570 -
\test_top/asrc/asrc/ratio_dect/n1128_ins15382 ALU COUT Out 0.035 2.606 -
test_top_asrc_asrc_ratio_dect_n1128_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1127_ins15383 ALU CIN In - 2.606 -
\test_top/asrc/asrc/ratio_dect/n1127_ins15383 ALU COUT Out 0.035 2.641 -
test_top_asrc_asrc_ratio_dect_n1127_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1126_ins15384 ALU CIN In - 2.641 -
\test_top/asrc/asrc/ratio_dect/n1126_ins15384 ALU COUT Out 0.035 2.676 -
test_top_asrc_asrc_ratio_dect_n1126_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1125_ins15385 ALU CIN In - 2.676 -
\test_top/asrc/asrc/ratio_dect/n1125_ins15385 ALU SUM Out 0.470 3.146 -
test_top_asrc_asrc_ratio_dect_n1125 Net - - 0.237 - 1
\test_top/asrc/asrc/ratio_dect/ratio_vari_23_ins13534 DL D In - 3.383 -

Total Path Delay: 3.383
Logic Delay: 2.729(80.7%)
Route Delay: 0.654(19.3%)


Path information for path number 4 : 
Clock Skew: 0.248
Setup Relationship: 5.000
Slack(non-critical): 2.342
Data Arrival Time: 3.348
Data Required Time: 5.690
Number of Logic Level: 5
Starting Point: test_top/asrc/asrc/ratio_dect/err_mag_vari_0_ins11352
Ending Point: test_top/asrc/asrc/ratio_dect/ratio_vari_22_ins13535
The Start Point Is Clocked By: DEFAULT_CLK[falling]
The End Point Is Clocked By: DEFAULT_CLK[rising]


Instance/Net Name Type Pin Name Pin Dir Delay Arrival Time Fanout
SYM_CLK_ibuf5427 IBUF I In - 0.000 -
SYM_CLK_ibuf5427 IBUF O Out 0.683 0.683 -
SYM_CLK Net - - 0.180 - 1797
\test_top/asrc/asrc/ratio_dect/err_mag_vari_0_ins11352 DFFCE CLK In - 0.863 -
\test_top/asrc/asrc/ratio_dect/err_mag_vari_0_ins11352 DFFCE Q Out 0.232 1.095 -
test_top_asrc_asrc_ratio_dect_err_mag_vari[0] Net - - 0.237 - 1
\test_top/asrc/asrc/ratio_dect/n1148_ins15362 ALU I1 In - 1.332 -
\test_top/asrc/asrc/ratio_dect/n1148_ins15362 ALU COUT Out 0.570 1.901 -
test_top_asrc_asrc_ratio_dect_n1148_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1147_ins15363 ALU CIN In - 1.901 -
\test_top/asrc/asrc/ratio_dect/n1147_ins15363 ALU COUT Out 0.035 1.937 -
test_top_asrc_asrc_ratio_dect_n1147_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1146_ins15364 ALU CIN In - 1.937 -
\test_top/asrc/asrc/ratio_dect/n1146_ins15364 ALU COUT Out 0.035 1.972 -
test_top_asrc_asrc_ratio_dect_n1146_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1145_ins15365 ALU CIN In - 1.972 -
\test_top/asrc/asrc/ratio_dect/n1145_ins15365 ALU COUT Out 0.035 2.007 -
test_top_asrc_asrc_ratio_dect_n1145_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1144_ins15366 ALU CIN In - 2.007 -
\test_top/asrc/asrc/ratio_dect/n1144_ins15366 ALU COUT Out 0.035 2.042 -
test_top_asrc_asrc_ratio_dect_n1144_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1143_ins15367 ALU CIN In - 2.042 -
\test_top/asrc/asrc/ratio_dect/n1143_ins15367 ALU COUT Out 0.035 2.078 -
test_top_asrc_asrc_ratio_dect_n1143_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1142_ins15368 ALU CIN In - 2.078 -
\test_top/asrc/asrc/ratio_dect/n1142_ins15368 ALU COUT Out 0.035 2.113 -
test_top_asrc_asrc_ratio_dect_n1142_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1141_ins15369 ALU CIN In - 2.113 -
\test_top/asrc/asrc/ratio_dect/n1141_ins15369 ALU COUT Out 0.035 2.148 -
test_top_asrc_asrc_ratio_dect_n1141_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1140_ins15370 ALU CIN In - 2.148 -
\test_top/asrc/asrc/ratio_dect/n1140_ins15370 ALU COUT Out 0.035 2.183 -
test_top_asrc_asrc_ratio_dect_n1140_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1139_ins15371 ALU CIN In - 2.183 -
\test_top/asrc/asrc/ratio_dect/n1139_ins15371 ALU COUT Out 0.035 2.218 -
test_top_asrc_asrc_ratio_dect_n1139_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1138_ins15372 ALU CIN In - 2.218 -
\test_top/asrc/asrc/ratio_dect/n1138_ins15372 ALU COUT Out 0.035 2.254 -
test_top_asrc_asrc_ratio_dect_n1138_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1137_ins15373 ALU CIN In - 2.254 -
\test_top/asrc/asrc/ratio_dect/n1137_ins15373 ALU COUT Out 0.035 2.289 -
test_top_asrc_asrc_ratio_dect_n1137_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1136_ins15374 ALU CIN In - 2.289 -
\test_top/asrc/asrc/ratio_dect/n1136_ins15374 ALU COUT Out 0.035 2.324 -
test_top_asrc_asrc_ratio_dect_n1136_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1135_ins15375 ALU CIN In - 2.324 -
\test_top/asrc/asrc/ratio_dect/n1135_ins15375 ALU COUT Out 0.035 2.359 -
test_top_asrc_asrc_ratio_dect_n1135_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1134_ins15376 ALU CIN In - 2.359 -
\test_top/asrc/asrc/ratio_dect/n1134_ins15376 ALU COUT Out 0.035 2.394 -
test_top_asrc_asrc_ratio_dect_n1134_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1133_ins15377 ALU CIN In - 2.394 -
\test_top/asrc/asrc/ratio_dect/n1133_ins15377 ALU COUT Out 0.035 2.430 -
test_top_asrc_asrc_ratio_dect_n1133_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1132_ins15378 ALU CIN In - 2.430 -
\test_top/asrc/asrc/ratio_dect/n1132_ins15378 ALU COUT Out 0.035 2.465 -
test_top_asrc_asrc_ratio_dect_n1132_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1131_ins15379 ALU CIN In - 2.465 -
\test_top/asrc/asrc/ratio_dect/n1131_ins15379 ALU COUT Out 0.035 2.500 -
test_top_asrc_asrc_ratio_dect_n1131_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1130_ins15380 ALU CIN In - 2.500 -
\test_top/asrc/asrc/ratio_dect/n1130_ins15380 ALU COUT Out 0.035 2.535 -
test_top_asrc_asrc_ratio_dect_n1130_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1129_ins15381 ALU CIN In - 2.535 -
\test_top/asrc/asrc/ratio_dect/n1129_ins15381 ALU COUT Out 0.035 2.570 -
test_top_asrc_asrc_ratio_dect_n1129_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1128_ins15382 ALU CIN In - 2.570 -
\test_top/asrc/asrc/ratio_dect/n1128_ins15382 ALU COUT Out 0.035 2.606 -
test_top_asrc_asrc_ratio_dect_n1128_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1127_ins15383 ALU CIN In - 2.606 -
\test_top/asrc/asrc/ratio_dect/n1127_ins15383 ALU COUT Out 0.035 2.641 -
test_top_asrc_asrc_ratio_dect_n1127_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1126_ins15384 ALU CIN In - 2.641 -
\test_top/asrc/asrc/ratio_dect/n1126_ins15384 ALU SUM Out 0.470 3.111 -
test_top_asrc_asrc_ratio_dect_n1126 Net - - 0.237 - 1
\test_top/asrc/asrc/ratio_dect/ratio_vari_22_ins13535 DL D In - 3.348 -

Total Path Delay: 3.348
Logic Delay: 2.694(80.5%)
Route Delay: 0.654(19.5%)


Path information for path number 5 : 
Clock Skew: 0.310
Setup Relationship: 5.000
Slack(non-critical): 2.377
Data Arrival Time: 3.313
Data Required Time: 5.690
Number of Logic Level: 4
Starting Point: test_top/asrc/asrc/ratio_dect/err_mag_vari_0_ins11352
Ending Point: test_top/asrc/asrc/ratio_dect/ratio_vari_21_ins13536
The Start Point Is Clocked By: DEFAULT_CLK[falling]
The End Point Is Clocked By: DEFAULT_CLK[rising]


Instance/Net Name Type Pin Name Pin Dir Delay Arrival Time Fanout
SYM_CLK_ibuf5427 IBUF I In - 0.000 -
SYM_CLK_ibuf5427 IBUF O Out 0.683 0.683 -
SYM_CLK Net - - 0.180 - 1797
\test_top/asrc/asrc/ratio_dect/err_mag_vari_0_ins11352 DFFCE CLK In - 0.863 -
\test_top/asrc/asrc/ratio_dect/err_mag_vari_0_ins11352 DFFCE Q Out 0.232 1.095 -
test_top_asrc_asrc_ratio_dect_err_mag_vari[0] Net - - 0.237 - 1
\test_top/asrc/asrc/ratio_dect/n1148_ins15362 ALU I1 In - 1.332 -
\test_top/asrc/asrc/ratio_dect/n1148_ins15362 ALU COUT Out 0.570 1.901 -
test_top_asrc_asrc_ratio_dect_n1148_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1147_ins15363 ALU CIN In - 1.901 -
\test_top/asrc/asrc/ratio_dect/n1147_ins15363 ALU COUT Out 0.035 1.937 -
test_top_asrc_asrc_ratio_dect_n1147_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1146_ins15364 ALU CIN In - 1.937 -
\test_top/asrc/asrc/ratio_dect/n1146_ins15364 ALU COUT Out 0.035 1.972 -
test_top_asrc_asrc_ratio_dect_n1146_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1145_ins15365 ALU CIN In - 1.972 -
\test_top/asrc/asrc/ratio_dect/n1145_ins15365 ALU COUT Out 0.035 2.007 -
test_top_asrc_asrc_ratio_dect_n1145_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1144_ins15366 ALU CIN In - 2.007 -
\test_top/asrc/asrc/ratio_dect/n1144_ins15366 ALU COUT Out 0.035 2.042 -
test_top_asrc_asrc_ratio_dect_n1144_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1143_ins15367 ALU CIN In - 2.042 -
\test_top/asrc/asrc/ratio_dect/n1143_ins15367 ALU COUT Out 0.035 2.078 -
test_top_asrc_asrc_ratio_dect_n1143_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1142_ins15368 ALU CIN In - 2.078 -
\test_top/asrc/asrc/ratio_dect/n1142_ins15368 ALU COUT Out 0.035 2.113 -
test_top_asrc_asrc_ratio_dect_n1142_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1141_ins15369 ALU CIN In - 2.113 -
\test_top/asrc/asrc/ratio_dect/n1141_ins15369 ALU COUT Out 0.035 2.148 -
test_top_asrc_asrc_ratio_dect_n1141_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1140_ins15370 ALU CIN In - 2.148 -
\test_top/asrc/asrc/ratio_dect/n1140_ins15370 ALU COUT Out 0.035 2.183 -
test_top_asrc_asrc_ratio_dect_n1140_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1139_ins15371 ALU CIN In - 2.183 -
\test_top/asrc/asrc/ratio_dect/n1139_ins15371 ALU COUT Out 0.035 2.218 -
test_top_asrc_asrc_ratio_dect_n1139_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1138_ins15372 ALU CIN In - 2.218 -
\test_top/asrc/asrc/ratio_dect/n1138_ins15372 ALU COUT Out 0.035 2.254 -
test_top_asrc_asrc_ratio_dect_n1138_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1137_ins15373 ALU CIN In - 2.254 -
\test_top/asrc/asrc/ratio_dect/n1137_ins15373 ALU COUT Out 0.035 2.289 -
test_top_asrc_asrc_ratio_dect_n1137_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1136_ins15374 ALU CIN In - 2.289 -
\test_top/asrc/asrc/ratio_dect/n1136_ins15374 ALU COUT Out 0.035 2.324 -
test_top_asrc_asrc_ratio_dect_n1136_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1135_ins15375 ALU CIN In - 2.324 -
\test_top/asrc/asrc/ratio_dect/n1135_ins15375 ALU COUT Out 0.035 2.359 -
test_top_asrc_asrc_ratio_dect_n1135_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1134_ins15376 ALU CIN In - 2.359 -
\test_top/asrc/asrc/ratio_dect/n1134_ins15376 ALU COUT Out 0.035 2.394 -
test_top_asrc_asrc_ratio_dect_n1134_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1133_ins15377 ALU CIN In - 2.394 -
\test_top/asrc/asrc/ratio_dect/n1133_ins15377 ALU COUT Out 0.035 2.430 -
test_top_asrc_asrc_ratio_dect_n1133_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1132_ins15378 ALU CIN In - 2.430 -
\test_top/asrc/asrc/ratio_dect/n1132_ins15378 ALU COUT Out 0.035 2.465 -
test_top_asrc_asrc_ratio_dect_n1132_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1131_ins15379 ALU CIN In - 2.465 -
\test_top/asrc/asrc/ratio_dect/n1131_ins15379 ALU COUT Out 0.035 2.500 -
test_top_asrc_asrc_ratio_dect_n1131_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1130_ins15380 ALU CIN In - 2.500 -
\test_top/asrc/asrc/ratio_dect/n1130_ins15380 ALU COUT Out 0.035 2.535 -
test_top_asrc_asrc_ratio_dect_n1130_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1129_ins15381 ALU CIN In - 2.535 -
\test_top/asrc/asrc/ratio_dect/n1129_ins15381 ALU COUT Out 0.035 2.570 -
test_top_asrc_asrc_ratio_dect_n1129_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1128_ins15382 ALU CIN In - 2.570 -
\test_top/asrc/asrc/ratio_dect/n1128_ins15382 ALU COUT Out 0.035 2.606 -
test_top_asrc_asrc_ratio_dect_n1128_4_COUT Net - - 0.000 - 1
\test_top/asrc/asrc/ratio_dect/n1127_ins15383 ALU CIN In - 2.606 -
\test_top/asrc/asrc/ratio_dect/n1127_ins15383 ALU SUM Out 0.470 3.076 -
test_top_asrc_asrc_ratio_dect_n1127 Net - - 0.237 - 1
\test_top/asrc/asrc/ratio_dect/ratio_vari_21_ins13536 DL D In - 3.313 -

Total Path Delay: 3.313
Logic Delay: 2.659(80.3%)
Route Delay: 0.654(19.7%)


Message

Info (EXT0100) : Run analyzation & elaboration
Info (EXT1482) : Analyzing Verilog file 'C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v'
Info (EXT1482) : Analyzing Verilog file 'C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\test_top.v'
Info (EXT1482) : Analyzing Verilog file 'C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v'
Info (EXT1482) : Analyzing Verilog file 'C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\data_prom\data_prom.v'
Info (EXT1018) : Compiling module 'gw2a18'(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:16)
Info (EXT1018) : Compiling module 'test_top'(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\test_top.v:15)
Info (EXT1018) : Compiling module 'ASRC_TOP'(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14381)
Info (EXT1018) : Compiling module '**'(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Info (EXT1018) : Compiling module '**'(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Info (EXT1018) : Compiling module '**'(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Info (EXT1018) : Compiling module '**'(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Info (EXT1018) : Compiling module '**'(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Info (EXT1018) : Compiling module '**'(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Info (EXT1018) : Compiling module '**'(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Info (EXT1018) : Compiling module '**'(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Info (EXT1018) : Compiling module '**'(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Info (EXT1018) : Compiling module '**'(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Info (EXT1018) : Compiling module '**'(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Info (EXT1018) : Compiling module '**'(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Info (EXT1018) : Compiling module 'Data_pROM'(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\data_prom\data_prom.v:8)
Warning (EXT1330) : Actual bit length 16 differs from formal bit length 32 for port 'DO'(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\data_prom\data_prom.v:22)
Warning (EXT1330) : Actual bit length 8 differs from formal bit length 32 for port 'DO'(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\data_prom\data_prom.v:95)
Warning (EXT1209) : Expression size 11 truncated to fit in target size 10(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\test_top.v:124)
Warning (EXT1209) : Expression size 13 truncated to fit in target size 12(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\test_top.v:134)
Warning (EXT1209) : Expression size 13 truncated to fit in target size 12(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\test_top.v:160)
Info (EXT0101) : Current top module is "gw2a18"
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_23_ins11053"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14632)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_22_ins11054"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14639)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_21_ins11055"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14646)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_20_ins11056"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14653)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_19_ins11057"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14660)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_18_ins11058"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14667)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_17_ins11059"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14674)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_16_ins11060"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14681)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_15_ins11061"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14688)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_14_ins11062"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14695)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_13_ins11063"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14702)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_12_ins11064"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14709)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_11_ins11065"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14716)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_10_ins11066"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14723)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_9_ins11067"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14730)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_8_ins11068"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14737)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_7_ins11069"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14744)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_6_ins11070"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14751)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_5_ins11071"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14758)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_4_ins11072"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14765)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_3_ins11073"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14772)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_2_ins11074"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14779)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_1_ins11075"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14786)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data1_d_0_ins11076"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14793)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_23_ins11077"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14800)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_22_ins11078"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14807)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_21_ins11079"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14814)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_20_ins11080"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14821)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_19_ins11081"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14828)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_18_ins11082"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14835)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_17_ins11083"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14842)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_16_ins11084"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14849)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_15_ins11085"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14856)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_14_ins11086"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14863)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_13_ins11087"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14870)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_12_ins11088"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14877)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_11_ins11089"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14884)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_10_ins11090"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14891)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_9_ins11091"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14898)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_8_ins11092"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14905)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_7_ins11093"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14912)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_6_ins11094"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14919)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_5_ins11095"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14926)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_4_ins11096"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14933)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_3_ins11097"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14940)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_2_ins11098"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14947)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_1_ins11099"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14954)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data2_d_0_ins11100"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14961)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_23_ins11101"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14968)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_22_ins11102"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14975)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_21_ins11103"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14982)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_20_ins11104"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14989)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_19_ins11105"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:14996)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_18_ins11106"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:15003)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_17_ins11107"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:15010)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_16_ins11108"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:15017)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_15_ins11109"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:15024)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_14_ins11110"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:15031)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_13_ins11111"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:15038)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_12_ins11112"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:15045)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_11_ins11113"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:15052)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_10_ins11114"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:15059)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_9_ins11115"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:15066)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_8_ins11116"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:15073)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_7_ins11117"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:15080)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_6_ins11118"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:15087)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_5_ins11119"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:15094)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_4_ins11120"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:15101)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_3_ins11121"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:15108)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_2_ins11122"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:15115)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_1_ins11123"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:15122)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\out_data3_d_0_ins11124"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:15129)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_23_ins13457"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_22_ins13458"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_21_ins13459"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_20_ins13460"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_19_ins13461"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_18_ins13462"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_17_ins13463"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_16_ins13464"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_15_ins13465"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_14_ins13466"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_13_ins13467"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_12_ins13468"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_11_ins13469"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_10_ins13470"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_9_ins13471"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_8_ins13472"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_7_ins13473"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_6_ins13474"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_5_ins13475"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_4_ins13476"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_3_ins13477"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_2_ins13478"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_1_ins13479"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data1_0_ins13480"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_23_ins13481"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_22_ins13482"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_21_ins13483"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_20_ins13484"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_19_ins13485"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_18_ins13486"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_17_ins13487"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_16_ins13488"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_15_ins13489"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_14_ins13490"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_13_ins13491"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_12_ins13492"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_11_ins13493"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_10_ins13494"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_9_ins13495"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_8_ins13496"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_7_ins13497"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_6_ins13498"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_5_ins13499"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_4_ins13500"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_3_ins13501"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_2_ins13502"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_1_ins13503"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data2_0_ins13504"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_23_ins13505"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_22_ins13506"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_21_ins13507"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_20_ins13508"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_19_ins13509"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_18_ins13510"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_17_ins13511"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_16_ins13512"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_15_ins13513"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_14_ins13514"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_13_ins13515"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_12_ins13516"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_11_ins13517"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_10_ins13518"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_9_ins13519"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_8_ins13520"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_7_ins13521"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_6_ins13522"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_5_ins13523"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_4_ins13524"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_3_ins13525"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_2_ins13526"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_1_ins13527"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\out_data3_0_ins13528"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\n3143_ins21882"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\n3119_ins21883"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Warning (NLT0001) : Sweep user defined dangling instance "test_top\asrc\asrc\fir_filter\n3095_ins21884"(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\asrc\asrc.v:0)
Info (CVT0001) : Run conversion
Warning (CVT0011) : Input "EXT_CLK" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:18)
Warning (CVT0011) : Input "RST_N" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:19)
Warning (CVT0011) : Input "LED[1]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:21)
Warning (CVT0011) : Input "LED[2]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:21)
Warning (CVT0011) : Input "LED[3]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:21)
Warning (CVT0011) : Input "LED[4]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:21)
Warning (CVT0011) : Input "KEY[2]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:22)
Warning (CVT0011) : Input "KEY[3]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:22)
Warning (CVT0011) : Input "KEY[4]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:22)
Warning (CVT0011) : Input "SW[2]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:23)
Warning (CVT0011) : Input "SW[3]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:23)
Warning (CVT0011) : Input "SW[4]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:23)
Warning (CVT0011) : Input "JTAG_TDI" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:26)
Warning (CVT0011) : Input "JTAG_TCK" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:29)
Warning (CVT0011) : Input "SPI_CLK" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:32)
Warning (CVT0011) : Input "SPI_MOSI" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:34)
Warning (CVT0012) : Inout "J11[1]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:36)
Warning (CVT0012) : Inout "J11[2]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:36)
Warning (CVT0012) : Inout "J11[3]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:36)
Warning (CVT0012) : Inout "J11[4]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:36)
Warning (CVT0012) : Inout "J11[5]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:36)
Warning (CVT0012) : Inout "J11[6]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:36)
Warning (CVT0012) : Inout "J11[7]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:36)
Warning (CVT0012) : Inout "J11[8]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:36)
Warning (CVT0012) : Inout "J11[9]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:36)
Warning (CVT0012) : Inout "J11[10]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:36)
Warning (CVT0012) : Inout "J11[11]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:36)
Warning (CVT0012) : Inout "J11[12]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:36)
Warning (CVT0012) : Inout "J11[13]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:36)
Warning (CVT0012) : Inout "J11[14]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:36)
Warning (CVT0012) : Inout "J11[15]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:36)
Warning (CVT0012) : Inout "J11[16]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:36)
Warning (CVT0012) : Inout "J11[17]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:36)
Warning (CVT0012) : Inout "J11[18]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:36)
Warning (CVT0012) : Inout "J10[1]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:37)
Warning (CVT0012) : Inout "J10[2]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:37)
Warning (CVT0012) : Inout "J10[3]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:37)
Warning (CVT0012) : Inout "J10[4]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:37)
Warning (CVT0012) : Inout "J10[5]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:37)
Warning (CVT0012) : Inout "J10[6]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:37)
Warning (CVT0012) : Inout "J10[7]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:37)
Warning (CVT0012) : Inout "J10[8]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:37)
Warning (CVT0012) : Inout "J10[9]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:37)
Warning (CVT0012) : Inout "J10[10]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:37)
Warning (CVT0012) : Inout "J10[11]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:37)
Warning (CVT0012) : Inout "J10[12]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:37)
Warning (CVT0012) : Inout "J10[13]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:37)
Warning (CVT0012) : Inout "J10[14]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:37)
Warning (CVT0012) : Inout "J10[15]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:37)
Warning (CVT0012) : Inout "J10[16]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:37)
Warning (CVT0012) : Inout "J10[17]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:37)
Warning (CVT0012) : Inout "J10[18]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:37)
Warning (CVT0012) : Inout "J3[5]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:39)
Warning (CVT0012) : Inout "J3[6]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:39)
Warning (CVT0012) : Inout "J3[7]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:39)
Warning (CVT0012) : Inout "J3[8]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:39)
Warning (CVT0012) : Inout "J3[9]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:39)
Warning (CVT0012) : Inout "J3[10]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:39)
Warning (CVT0012) : Inout "J3[11]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:39)
Warning (CVT0012) : Inout "J3[12]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:39)
Warning (CVT0012) : Inout "J3[13]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:39)
Warning (CVT0012) : Inout "J3[14]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:39)
Warning (CVT0012) : Inout "J3[15]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:39)
Warning (CVT0012) : Inout "J3[16]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:39)
Warning (CVT0012) : Inout "J3[17]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:39)
Warning (CVT0012) : Inout "J3[18]" is unused(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:39)
Warning (CVT0003) : Output "JTAG_TDO" has undriven bits, assigning undriven bits to 0. Simulation mismatch possible(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:27)
Warning (CVT0003) : Output "JTAG_TMS" has undriven bits, assigning undriven bits to 0. Simulation mismatch possible(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:28)
Warning (CVT0003) : Output "SPI_CS" has undriven bits, assigning undriven bits to 0. Simulation mismatch possible(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:31)
Warning (CVT0003) : Output "SPI_MISO" has undriven bits, assigning undriven bits to 0. Simulation mismatch possible(C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\src\gw2a18.v:33)
Info (DIO0001) : Run device independent optimization
Info (DIO0006) : Register and gate optimizing before inferencing
Info (DSP0001) : DSP inferencing
Info (RAM0001) : RAM inferencing
Info (ATO0001) : Adder tree reduction
Info (ATO0002) : Rebuild ALU instances from adder tree nodes
Info (DIO0001) : Run device independent optimization
Info (DIO0007) : Register and gate optimizing before mapping
Info (MAP0001) : Run tech-mapping
Info (MAP0003) : Run logic optimization
Info (DIO0001) : Run device independent optimization
Info (SYN0009) : Write post-map netlist to file: C:\Users\Noa\Desktop\MyWorkplace\Program\FPGA\ASRC\RefDesign\ASRC\impl\gwsynthesis\ASRC.vg

Summary

Total Warnings: 222
Total Informations: 35

Synthesis completed successfully!
Process took 0h:0m:20s realtime, 0h:0m:24s cputime
Memory peak: 99.9MB