Timing Messages

Report Title Timing Analysis Report
Design File E:\work_files\IP_A_new\GoConfig\00_2024\JTAG_JTAG\ref_release\fpga_project\impl\gwsynthesis\fpga_project.vg
Physical Constraints File E:\work_files\IP_A_new\GoConfig\00_2024\JTAG_JTAG\ref_release\fpga_project\src\fpga_project.cst
Timing Constraint File ---
Tool Version V1.9.9.03 (64-bit)
Part Number GW1N-LV2LQ144XC7/I6
Device GW1N-2
Device Version C
Created Time Mon May 6 14:59:52 2024
Legal Announcement Copyright (C)2014-2024 Gowin Semiconductor Corporation. All rights reserved.

Timing Summaries

STA Tool Run Summary:

Setup Delay Model Slow 1.14V 85C C7/I6
Hold Delay Model Fast 1.26V 0C C7/I6
Numbers of Paths Analyzed 1067
Numbers of Endpoints Analyzed 693
Numbers of Falling Endpoints 0
Numbers of Setup Violated Endpoints 0
Numbers of Hold Violated Endpoints 0

Clock Summary:

Clock Name Type Period Frequency(MHz) Rise Fall Source Master Objects
inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk Base 40.000 25.000 0.000 20.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT

Max Frequency Summary:

NO. Clock Name Constraint Actual Fmax Logic Level Entity
1 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk 25.000(MHz) 114.130(MHz) 9 TOP

Total Negative Slack Summary:

Clock Name Analysis Type Endpoints TNS Number of Endpoints
inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk Setup 0.000 0
inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk Hold 0.000 0

Timing Details

Path Slacks Table:

Setup Paths Table

Report Command:report_timing -setup -max_paths 25 -max_common_paths 1

Path Number Path Slack From Node To Node From Clock To Clock Relation Clock Skew Data Delay
1 31.238 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_1_s0/CE inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 8.730
2 31.238 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_2_s0/CE inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 8.730
3 31.238 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_3_s0/CE inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 8.730
4 31.238 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_4_s0/CE inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 8.730
5 31.238 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_5_s0/CE inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 8.730
6 31.238 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_6_s0/CE inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 8.730
7 31.238 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_7_s0/CE inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 8.730
8 31.238 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_8_s0/CE inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 8.730
9 31.238 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_9_s0/CE inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 8.730
10 31.238 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_10_s0/CE inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 8.730
11 31.238 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_11_s0/CE inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 8.730
12 31.245 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_12_s0/CE inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 8.723
13 31.245 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_13_s0/CE inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 8.723
14 31.564 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_0_s3/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 8.140
15 31.573 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_curr_0_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 8.131
16 31.622 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rden_d0_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 8.081
17 31.923 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_curr_1_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 7.781
18 32.382 led_cnt_7_s0/Q led_cnt_28_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 7.321
19 32.382 led_cnt_7_s0/Q led_cnt_29_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 7.321
20 32.382 led_cnt_7_s0/Q led_cnt_30_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 7.321
21 32.548 led_cnt_7_s0/Q led_cnt_31_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 7.156
22 32.572 led_cnt_7_s0/Q led_cnt_27_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 7.131
23 32.651 led_cnt_7_s0/Q led_cnt_23_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 7.052
24 32.651 led_cnt_7_s0/Q led_cnt_24_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 7.052
25 32.774 led_cnt_7_s0/Q led_cnt_26_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 6.929

Hold Paths Table

Report Command:report_timing -hold -max_paths 25 -max_common_paths 1

Path Number Path Slack From Node To Node From Clock To Clock Relation Clock Skew Data Delay
1 0.524 inst_JTAG_HUB/inst_goConfig_JTAG/u_tms/cnt_1_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_tms/cnt_1_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.524
2 0.524 inst_JTAG_HUB/inst_goConfig_JTAG/u_tck/cnt_1_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_tck/cnt_1_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.524
3 0.524 led_cnt_10_s0/Q led_cnt_10_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.524
4 0.524 led_cnt_21_s0/Q led_cnt_21_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.524
5 0.525 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_0_s2/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_0_s2/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.525
6 0.525 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_2_5M_s1/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_2_5M_s1/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.525
7 0.525 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_1_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_1_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.525
8 0.525 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_3_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_3_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.525
9 0.525 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_7_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.525
10 0.525 led_cnt_1_s0/Q led_cnt_1_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.525
11 0.525 led_cnt_2_s0/Q led_cnt_2_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.525
12 0.525 led_cnt_6_s0/Q led_cnt_6_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.525
13 0.525 led_cnt_9_s0/Q led_cnt_9_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.525
14 0.525 led_cnt_16_s0/Q led_cnt_16_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.525
15 0.525 led_cnt_17_s0/Q led_cnt_17_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.525
16 0.525 led_cnt_27_s0/Q led_cnt_27_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.525
17 0.525 led_cnt_29_s0/Q led_cnt_29_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.525
18 0.526 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_2_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_2_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.526
19 0.526 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_1_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_1_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.526
20 0.526 led_cnt_13_s0/Q led_cnt_13_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.526
21 0.526 led_cnt_24_s0/Q led_cnt_24_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.526
22 0.527 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_12_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_12_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.527
23 0.528 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_4_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_4_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.528
24 0.529 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_curr_0_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_curr_0_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.529
25 0.541 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_2_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_2_s0/D inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 0.541

Recovery Paths Table

Report Command:report_timing -recovery -max_paths 25 -max_common_paths 1

Path Number Path Slack From Node To Node From Clock To Clock Relation Clock Skew Data Delay
1 34.462 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/mem_mem_0_0_s/RESETB inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
2 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_0_s3/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
3 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_0_s3/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
4 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/full_flag_r_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
5 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_0_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
6 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_1_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
7 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_2_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
8 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_3_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
9 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_4_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
10 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_5_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
11 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_6_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
12 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_7_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
13 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_8_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
14 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_9_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
15 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_10_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
16 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_11_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
17 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_12_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
18 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_13_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
19 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_0_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
20 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_1_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
21 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_2_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
22 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_3_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
23 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_4_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
24 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_5_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386
25 34.582 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_6_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 40.000 0.000 5.386

Removal Paths Table

Report Command:report_timing -removal -max_paths 25 -max_common_paths 1

Path Number Path Slack From Node To Node From Clock To Clock Relation Clock Skew Data Delay
1 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/mem_mem_0_0_s/RESETB inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
2 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_0_s3/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
3 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_0_s3/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
4 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/full_flag_r_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
5 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_0_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
6 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_1_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
7 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_2_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
8 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_3_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
9 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_4_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
10 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_5_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
11 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_6_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
12 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_7_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
13 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_8_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
14 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_9_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
15 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_10_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
16 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_11_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
17 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_12_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
18 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_13_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
19 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_0_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
20 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_1_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
21 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_2_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
22 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_3_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
23 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_4_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
24 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_5_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508
25 2.499 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_6_s0/CLEAR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R] 0.000 0.000 2.508

Minimum Pulse Width Table:

Report Command:report_min_pulse_width -nworst 10 -detail

Number Slack Actual Width Required Width Type Clock Objects
1 19.017 19.943 0.926 Low Pulse Width inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk led_cnt_30_s0
2 19.017 19.943 0.926 Low Pulse Width inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk led_cnt_28_s0
3 19.017 19.943 0.926 Low Pulse Width inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk led_cnt_24_s0
4 19.017 19.943 0.926 Low Pulse Width inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk led_cnt_16_s0
5 19.017 19.943 0.926 Low Pulse Width inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk led_cnt_0_s0
6 19.017 19.943 0.926 Low Pulse Width inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/tdi_vec_19_s0
7 19.017 19.943 0.926 Low Pulse Width inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/tdi_vec_d1_19_s0
8 19.017 19.943 0.926 Low Pulse Width inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_12_s0
9 19.017 19.943 0.926 Low Pulse Width inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_13_s0
10 19.017 19.943 0.926 Low Pulse Width inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/tdi_vec_d1_20_s0

Timing Report By Analysis Type:

Setup Analysis Report

Report Command:report_timing -setup -max_paths 25 -max_common_paths 1

Path1

Path Summary:

Slack 31.238
Data Arrival Time 8.910
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_1_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/CLK
0.520 0.340 tC2Q RF 2 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q
1.118 0.598 tNET FF 1 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/I2
1.728 0.609 tINS FF 5 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/F
2.465 0.737 tNET FF 1 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/I2
2.929 0.464 tINS FF 4 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/F
2.945 0.016 tNET FF 1 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/I2
3.759 0.814 tINS FF 3 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/F
3.771 0.012 tNET FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/I2
4.536 0.765 tINS FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/F
5.144 0.608 tNET FF 2 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/I1
5.919 0.774 tINS FF 1 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/COUT
5.919 0.000 tNET FF 2 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/CIN
5.961 0.042 tINS FF 1 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/COUT
5.961 0.000 tNET FF 2 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/CIN
6.003 0.042 tINS FF 1 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/COUT
6.003 0.000 tNET FF 2 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/CIN
6.045 0.042 tINS FF 1 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/COUT
6.045 0.000 tNET FF 2 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/CIN
6.088 0.042 tINS FF 1 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/COUT
6.088 0.000 tNET FF 2 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/CIN
6.130 0.042 tINS FF 1 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/COUT
6.130 0.000 tNET FF 2 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/CIN
6.172 0.042 tINS FF 1 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/COUT
6.172 0.000 tNET FF 2 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/CIN
6.214 0.042 tINS FF 1 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/COUT
6.214 0.000 tNET FF 2 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/CIN
6.257 0.042 tINS FF 1 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/COUT
6.257 0.000 tNET FF 2 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/CIN
6.299 0.042 tINS FF 1 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/COUT
6.299 0.000 tNET FF 2 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/CIN
6.341 0.042 tINS FF 1 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/COUT
6.341 0.000 tNET FF 2 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/CIN
6.383 0.042 tINS FF 1 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/COUT
6.383 0.000 tNET FF 2 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/CIN
6.425 0.042 tINS FF 1 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/COUT
6.425 0.000 tNET FF 2 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/CIN
6.468 0.042 tINS FF 5 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/COUT
7.856 1.389 tNET FF 1 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/I1
8.319 0.463 tINS FR 13 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/F
8.910 0.591 tNET RR 1 R6C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_1_s0/CE

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R6C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_1_s0/CLK
40.148 -0.032 tSu 1 R6C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_1_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 9
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 4.439, 50.844%; route: 3.952, 45.266%; tC2Q: 0.340, 3.890%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path2

Path Summary:

Slack 31.238
Data Arrival Time 8.910
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_2_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/CLK
0.520 0.340 tC2Q RF 2 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q
1.118 0.598 tNET FF 1 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/I2
1.728 0.609 tINS FF 5 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/F
2.465 0.737 tNET FF 1 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/I2
2.929 0.464 tINS FF 4 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/F
2.945 0.016 tNET FF 1 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/I2
3.759 0.814 tINS FF 3 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/F
3.771 0.012 tNET FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/I2
4.536 0.765 tINS FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/F
5.144 0.608 tNET FF 2 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/I1
5.919 0.774 tINS FF 1 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/COUT
5.919 0.000 tNET FF 2 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/CIN
5.961 0.042 tINS FF 1 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/COUT
5.961 0.000 tNET FF 2 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/CIN
6.003 0.042 tINS FF 1 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/COUT
6.003 0.000 tNET FF 2 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/CIN
6.045 0.042 tINS FF 1 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/COUT
6.045 0.000 tNET FF 2 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/CIN
6.088 0.042 tINS FF 1 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/COUT
6.088 0.000 tNET FF 2 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/CIN
6.130 0.042 tINS FF 1 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/COUT
6.130 0.000 tNET FF 2 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/CIN
6.172 0.042 tINS FF 1 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/COUT
6.172 0.000 tNET FF 2 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/CIN
6.214 0.042 tINS FF 1 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/COUT
6.214 0.000 tNET FF 2 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/CIN
6.257 0.042 tINS FF 1 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/COUT
6.257 0.000 tNET FF 2 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/CIN
6.299 0.042 tINS FF 1 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/COUT
6.299 0.000 tNET FF 2 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/CIN
6.341 0.042 tINS FF 1 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/COUT
6.341 0.000 tNET FF 2 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/CIN
6.383 0.042 tINS FF 1 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/COUT
6.383 0.000 tNET FF 2 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/CIN
6.425 0.042 tINS FF 1 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/COUT
6.425 0.000 tNET FF 2 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/CIN
6.468 0.042 tINS FF 5 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/COUT
7.856 1.389 tNET FF 1 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/I1
8.319 0.463 tINS FR 13 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/F
8.910 0.591 tNET RR 1 R6C9[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_2_s0/CE

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R6C9[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_2_s0/CLK
40.148 -0.032 tSu 1 R6C9[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_2_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 9
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 4.439, 50.844%; route: 3.952, 45.266%; tC2Q: 0.340, 3.890%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path3

Path Summary:

Slack 31.238
Data Arrival Time 8.910
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_3_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/CLK
0.520 0.340 tC2Q RF 2 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q
1.118 0.598 tNET FF 1 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/I2
1.728 0.609 tINS FF 5 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/F
2.465 0.737 tNET FF 1 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/I2
2.929 0.464 tINS FF 4 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/F
2.945 0.016 tNET FF 1 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/I2
3.759 0.814 tINS FF 3 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/F
3.771 0.012 tNET FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/I2
4.536 0.765 tINS FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/F
5.144 0.608 tNET FF 2 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/I1
5.919 0.774 tINS FF 1 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/COUT
5.919 0.000 tNET FF 2 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/CIN
5.961 0.042 tINS FF 1 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/COUT
5.961 0.000 tNET FF 2 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/CIN
6.003 0.042 tINS FF 1 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/COUT
6.003 0.000 tNET FF 2 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/CIN
6.045 0.042 tINS FF 1 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/COUT
6.045 0.000 tNET FF 2 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/CIN
6.088 0.042 tINS FF 1 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/COUT
6.088 0.000 tNET FF 2 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/CIN
6.130 0.042 tINS FF 1 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/COUT
6.130 0.000 tNET FF 2 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/CIN
6.172 0.042 tINS FF 1 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/COUT
6.172 0.000 tNET FF 2 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/CIN
6.214 0.042 tINS FF 1 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/COUT
6.214 0.000 tNET FF 2 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/CIN
6.257 0.042 tINS FF 1 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/COUT
6.257 0.000 tNET FF 2 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/CIN
6.299 0.042 tINS FF 1 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/COUT
6.299 0.000 tNET FF 2 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/CIN
6.341 0.042 tINS FF 1 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/COUT
6.341 0.000 tNET FF 2 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/CIN
6.383 0.042 tINS FF 1 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/COUT
6.383 0.000 tNET FF 2 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/CIN
6.425 0.042 tINS FF 1 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/COUT
6.425 0.000 tNET FF 2 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/CIN
6.468 0.042 tINS FF 5 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/COUT
7.856 1.389 tNET FF 1 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/I1
8.319 0.463 tINS FR 13 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/F
8.910 0.591 tNET RR 1 R6C9[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_3_s0/CE

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R6C9[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_3_s0/CLK
40.148 -0.032 tSu 1 R6C9[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_3_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 9
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 4.439, 50.844%; route: 3.952, 45.266%; tC2Q: 0.340, 3.890%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path4

Path Summary:

Slack 31.238
Data Arrival Time 8.910
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_4_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/CLK
0.520 0.340 tC2Q RF 2 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q
1.118 0.598 tNET FF 1 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/I2
1.728 0.609 tINS FF 5 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/F
2.465 0.737 tNET FF 1 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/I2
2.929 0.464 tINS FF 4 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/F
2.945 0.016 tNET FF 1 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/I2
3.759 0.814 tINS FF 3 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/F
3.771 0.012 tNET FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/I2
4.536 0.765 tINS FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/F
5.144 0.608 tNET FF 2 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/I1
5.919 0.774 tINS FF 1 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/COUT
5.919 0.000 tNET FF 2 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/CIN
5.961 0.042 tINS FF 1 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/COUT
5.961 0.000 tNET FF 2 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/CIN
6.003 0.042 tINS FF 1 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/COUT
6.003 0.000 tNET FF 2 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/CIN
6.045 0.042 tINS FF 1 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/COUT
6.045 0.000 tNET FF 2 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/CIN
6.088 0.042 tINS FF 1 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/COUT
6.088 0.000 tNET FF 2 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/CIN
6.130 0.042 tINS FF 1 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/COUT
6.130 0.000 tNET FF 2 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/CIN
6.172 0.042 tINS FF 1 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/COUT
6.172 0.000 tNET FF 2 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/CIN
6.214 0.042 tINS FF 1 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/COUT
6.214 0.000 tNET FF 2 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/CIN
6.257 0.042 tINS FF 1 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/COUT
6.257 0.000 tNET FF 2 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/CIN
6.299 0.042 tINS FF 1 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/COUT
6.299 0.000 tNET FF 2 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/CIN
6.341 0.042 tINS FF 1 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/COUT
6.341 0.000 tNET FF 2 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/CIN
6.383 0.042 tINS FF 1 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/COUT
6.383 0.000 tNET FF 2 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/CIN
6.425 0.042 tINS FF 1 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/COUT
6.425 0.000 tNET FF 2 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/CIN
6.468 0.042 tINS FF 5 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/COUT
7.856 1.389 tNET FF 1 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/I1
8.319 0.463 tINS FR 13 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/F
8.910 0.591 tNET RR 1 R6C9[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_4_s0/CE

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R6C9[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_4_s0/CLK
40.148 -0.032 tSu 1 R6C9[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_4_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 9
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 4.439, 50.844%; route: 3.952, 45.266%; tC2Q: 0.340, 3.890%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path5

Path Summary:

Slack 31.238
Data Arrival Time 8.910
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_5_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/CLK
0.520 0.340 tC2Q RF 2 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q
1.118 0.598 tNET FF 1 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/I2
1.728 0.609 tINS FF 5 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/F
2.465 0.737 tNET FF 1 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/I2
2.929 0.464 tINS FF 4 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/F
2.945 0.016 tNET FF 1 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/I2
3.759 0.814 tINS FF 3 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/F
3.771 0.012 tNET FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/I2
4.536 0.765 tINS FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/F
5.144 0.608 tNET FF 2 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/I1
5.919 0.774 tINS FF 1 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/COUT
5.919 0.000 tNET FF 2 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/CIN
5.961 0.042 tINS FF 1 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/COUT
5.961 0.000 tNET FF 2 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/CIN
6.003 0.042 tINS FF 1 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/COUT
6.003 0.000 tNET FF 2 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/CIN
6.045 0.042 tINS FF 1 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/COUT
6.045 0.000 tNET FF 2 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/CIN
6.088 0.042 tINS FF 1 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/COUT
6.088 0.000 tNET FF 2 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/CIN
6.130 0.042 tINS FF 1 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/COUT
6.130 0.000 tNET FF 2 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/CIN
6.172 0.042 tINS FF 1 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/COUT
6.172 0.000 tNET FF 2 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/CIN
6.214 0.042 tINS FF 1 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/COUT
6.214 0.000 tNET FF 2 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/CIN
6.257 0.042 tINS FF 1 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/COUT
6.257 0.000 tNET FF 2 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/CIN
6.299 0.042 tINS FF 1 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/COUT
6.299 0.000 tNET FF 2 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/CIN
6.341 0.042 tINS FF 1 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/COUT
6.341 0.000 tNET FF 2 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/CIN
6.383 0.042 tINS FF 1 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/COUT
6.383 0.000 tNET FF 2 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/CIN
6.425 0.042 tINS FF 1 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/COUT
6.425 0.000 tNET FF 2 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/CIN
6.468 0.042 tINS FF 5 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/COUT
7.856 1.389 tNET FF 1 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/I1
8.319 0.463 tINS FR 13 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/F
8.910 0.591 tNET RR 1 R6C9[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_5_s0/CE

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R6C9[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_5_s0/CLK
40.148 -0.032 tSu 1 R6C9[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_5_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 9
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 4.439, 50.844%; route: 3.952, 45.266%; tC2Q: 0.340, 3.890%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path6

Path Summary:

Slack 31.238
Data Arrival Time 8.910
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_6_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/CLK
0.520 0.340 tC2Q RF 2 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q
1.118 0.598 tNET FF 1 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/I2
1.728 0.609 tINS FF 5 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/F
2.465 0.737 tNET FF 1 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/I2
2.929 0.464 tINS FF 4 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/F
2.945 0.016 tNET FF 1 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/I2
3.759 0.814 tINS FF 3 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/F
3.771 0.012 tNET FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/I2
4.536 0.765 tINS FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/F
5.144 0.608 tNET FF 2 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/I1
5.919 0.774 tINS FF 1 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/COUT
5.919 0.000 tNET FF 2 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/CIN
5.961 0.042 tINS FF 1 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/COUT
5.961 0.000 tNET FF 2 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/CIN
6.003 0.042 tINS FF 1 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/COUT
6.003 0.000 tNET FF 2 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/CIN
6.045 0.042 tINS FF 1 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/COUT
6.045 0.000 tNET FF 2 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/CIN
6.088 0.042 tINS FF 1 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/COUT
6.088 0.000 tNET FF 2 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/CIN
6.130 0.042 tINS FF 1 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/COUT
6.130 0.000 tNET FF 2 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/CIN
6.172 0.042 tINS FF 1 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/COUT
6.172 0.000 tNET FF 2 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/CIN
6.214 0.042 tINS FF 1 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/COUT
6.214 0.000 tNET FF 2 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/CIN
6.257 0.042 tINS FF 1 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/COUT
6.257 0.000 tNET FF 2 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/CIN
6.299 0.042 tINS FF 1 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/COUT
6.299 0.000 tNET FF 2 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/CIN
6.341 0.042 tINS FF 1 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/COUT
6.341 0.000 tNET FF 2 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/CIN
6.383 0.042 tINS FF 1 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/COUT
6.383 0.000 tNET FF 2 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/CIN
6.425 0.042 tINS FF 1 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/COUT
6.425 0.000 tNET FF 2 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/CIN
6.468 0.042 tINS FF 5 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/COUT
7.856 1.389 tNET FF 1 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/I1
8.319 0.463 tINS FR 13 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/F
8.910 0.591 tNET RR 1 R6C10[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_6_s0/CE

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R6C10[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_6_s0/CLK
40.148 -0.032 tSu 1 R6C10[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_6_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 9
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 4.439, 50.844%; route: 3.952, 45.266%; tC2Q: 0.340, 3.890%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path7

Path Summary:

Slack 31.238
Data Arrival Time 8.910
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_7_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/CLK
0.520 0.340 tC2Q RF 2 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q
1.118 0.598 tNET FF 1 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/I2
1.728 0.609 tINS FF 5 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/F
2.465 0.737 tNET FF 1 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/I2
2.929 0.464 tINS FF 4 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/F
2.945 0.016 tNET FF 1 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/I2
3.759 0.814 tINS FF 3 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/F
3.771 0.012 tNET FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/I2
4.536 0.765 tINS FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/F
5.144 0.608 tNET FF 2 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/I1
5.919 0.774 tINS FF 1 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/COUT
5.919 0.000 tNET FF 2 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/CIN
5.961 0.042 tINS FF 1 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/COUT
5.961 0.000 tNET FF 2 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/CIN
6.003 0.042 tINS FF 1 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/COUT
6.003 0.000 tNET FF 2 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/CIN
6.045 0.042 tINS FF 1 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/COUT
6.045 0.000 tNET FF 2 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/CIN
6.088 0.042 tINS FF 1 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/COUT
6.088 0.000 tNET FF 2 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/CIN
6.130 0.042 tINS FF 1 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/COUT
6.130 0.000 tNET FF 2 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/CIN
6.172 0.042 tINS FF 1 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/COUT
6.172 0.000 tNET FF 2 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/CIN
6.214 0.042 tINS FF 1 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/COUT
6.214 0.000 tNET FF 2 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/CIN
6.257 0.042 tINS FF 1 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/COUT
6.257 0.000 tNET FF 2 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/CIN
6.299 0.042 tINS FF 1 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/COUT
6.299 0.000 tNET FF 2 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/CIN
6.341 0.042 tINS FF 1 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/COUT
6.341 0.000 tNET FF 2 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/CIN
6.383 0.042 tINS FF 1 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/COUT
6.383 0.000 tNET FF 2 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/CIN
6.425 0.042 tINS FF 1 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/COUT
6.425 0.000 tNET FF 2 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/CIN
6.468 0.042 tINS FF 5 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/COUT
7.856 1.389 tNET FF 1 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/I1
8.319 0.463 tINS FR 13 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/F
8.910 0.591 tNET RR 1 R6C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_7_s0/CE

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R6C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_7_s0/CLK
40.148 -0.032 tSu 1 R6C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_7_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 9
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 4.439, 50.844%; route: 3.952, 45.266%; tC2Q: 0.340, 3.890%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path8

Path Summary:

Slack 31.238
Data Arrival Time 8.910
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_8_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/CLK
0.520 0.340 tC2Q RF 2 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q
1.118 0.598 tNET FF 1 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/I2
1.728 0.609 tINS FF 5 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/F
2.465 0.737 tNET FF 1 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/I2
2.929 0.464 tINS FF 4 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/F
2.945 0.016 tNET FF 1 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/I2
3.759 0.814 tINS FF 3 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/F
3.771 0.012 tNET FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/I2
4.536 0.765 tINS FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/F
5.144 0.608 tNET FF 2 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/I1
5.919 0.774 tINS FF 1 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/COUT
5.919 0.000 tNET FF 2 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/CIN
5.961 0.042 tINS FF 1 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/COUT
5.961 0.000 tNET FF 2 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/CIN
6.003 0.042 tINS FF 1 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/COUT
6.003 0.000 tNET FF 2 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/CIN
6.045 0.042 tINS FF 1 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/COUT
6.045 0.000 tNET FF 2 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/CIN
6.088 0.042 tINS FF 1 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/COUT
6.088 0.000 tNET FF 2 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/CIN
6.130 0.042 tINS FF 1 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/COUT
6.130 0.000 tNET FF 2 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/CIN
6.172 0.042 tINS FF 1 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/COUT
6.172 0.000 tNET FF 2 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/CIN
6.214 0.042 tINS FF 1 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/COUT
6.214 0.000 tNET FF 2 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/CIN
6.257 0.042 tINS FF 1 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/COUT
6.257 0.000 tNET FF 2 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/CIN
6.299 0.042 tINS FF 1 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/COUT
6.299 0.000 tNET FF 2 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/CIN
6.341 0.042 tINS FF 1 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/COUT
6.341 0.000 tNET FF 2 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/CIN
6.383 0.042 tINS FF 1 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/COUT
6.383 0.000 tNET FF 2 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/CIN
6.425 0.042 tINS FF 1 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/COUT
6.425 0.000 tNET FF 2 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/CIN
6.468 0.042 tINS FF 5 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/COUT
7.856 1.389 tNET FF 1 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/I1
8.319 0.463 tINS FR 13 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/F
8.910 0.591 tNET RR 1 R6C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_8_s0/CE

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R6C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_8_s0/CLK
40.148 -0.032 tSu 1 R6C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_8_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 9
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 4.439, 50.844%; route: 3.952, 45.266%; tC2Q: 0.340, 3.890%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path9

Path Summary:

Slack 31.238
Data Arrival Time 8.910
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_9_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/CLK
0.520 0.340 tC2Q RF 2 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q
1.118 0.598 tNET FF 1 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/I2
1.728 0.609 tINS FF 5 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/F
2.465 0.737 tNET FF 1 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/I2
2.929 0.464 tINS FF 4 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/F
2.945 0.016 tNET FF 1 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/I2
3.759 0.814 tINS FF 3 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/F
3.771 0.012 tNET FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/I2
4.536 0.765 tINS FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/F
5.144 0.608 tNET FF 2 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/I1
5.919 0.774 tINS FF 1 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/COUT
5.919 0.000 tNET FF 2 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/CIN
5.961 0.042 tINS FF 1 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/COUT
5.961 0.000 tNET FF 2 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/CIN
6.003 0.042 tINS FF 1 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/COUT
6.003 0.000 tNET FF 2 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/CIN
6.045 0.042 tINS FF 1 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/COUT
6.045 0.000 tNET FF 2 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/CIN
6.088 0.042 tINS FF 1 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/COUT
6.088 0.000 tNET FF 2 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/CIN
6.130 0.042 tINS FF 1 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/COUT
6.130 0.000 tNET FF 2 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/CIN
6.172 0.042 tINS FF 1 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/COUT
6.172 0.000 tNET FF 2 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/CIN
6.214 0.042 tINS FF 1 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/COUT
6.214 0.000 tNET FF 2 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/CIN
6.257 0.042 tINS FF 1 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/COUT
6.257 0.000 tNET FF 2 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/CIN
6.299 0.042 tINS FF 1 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/COUT
6.299 0.000 tNET FF 2 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/CIN
6.341 0.042 tINS FF 1 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/COUT
6.341 0.000 tNET FF 2 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/CIN
6.383 0.042 tINS FF 1 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/COUT
6.383 0.000 tNET FF 2 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/CIN
6.425 0.042 tINS FF 1 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/COUT
6.425 0.000 tNET FF 2 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/CIN
6.468 0.042 tINS FF 5 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/COUT
7.856 1.389 tNET FF 1 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/I1
8.319 0.463 tINS FR 13 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/F
8.910 0.591 tNET RR 1 R6C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_9_s0/CE

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R6C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_9_s0/CLK
40.148 -0.032 tSu 1 R6C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_9_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 9
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 4.439, 50.844%; route: 3.952, 45.266%; tC2Q: 0.340, 3.890%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path10

Path Summary:

Slack 31.238
Data Arrival Time 8.910
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_10_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/CLK
0.520 0.340 tC2Q RF 2 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q
1.118 0.598 tNET FF 1 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/I2
1.728 0.609 tINS FF 5 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/F
2.465 0.737 tNET FF 1 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/I2
2.929 0.464 tINS FF 4 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/F
2.945 0.016 tNET FF 1 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/I2
3.759 0.814 tINS FF 3 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/F
3.771 0.012 tNET FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/I2
4.536 0.765 tINS FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/F
5.144 0.608 tNET FF 2 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/I1
5.919 0.774 tINS FF 1 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/COUT
5.919 0.000 tNET FF 2 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/CIN
5.961 0.042 tINS FF 1 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/COUT
5.961 0.000 tNET FF 2 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/CIN
6.003 0.042 tINS FF 1 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/COUT
6.003 0.000 tNET FF 2 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/CIN
6.045 0.042 tINS FF 1 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/COUT
6.045 0.000 tNET FF 2 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/CIN
6.088 0.042 tINS FF 1 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/COUT
6.088 0.000 tNET FF 2 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/CIN
6.130 0.042 tINS FF 1 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/COUT
6.130 0.000 tNET FF 2 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/CIN
6.172 0.042 tINS FF 1 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/COUT
6.172 0.000 tNET FF 2 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/CIN
6.214 0.042 tINS FF 1 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/COUT
6.214 0.000 tNET FF 2 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/CIN
6.257 0.042 tINS FF 1 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/COUT
6.257 0.000 tNET FF 2 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/CIN
6.299 0.042 tINS FF 1 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/COUT
6.299 0.000 tNET FF 2 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/CIN
6.341 0.042 tINS FF 1 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/COUT
6.341 0.000 tNET FF 2 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/CIN
6.383 0.042 tINS FF 1 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/COUT
6.383 0.000 tNET FF 2 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/CIN
6.425 0.042 tINS FF 1 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/COUT
6.425 0.000 tNET FF 2 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/CIN
6.468 0.042 tINS FF 5 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/COUT
7.856 1.389 tNET FF 1 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/I1
8.319 0.463 tINS FR 13 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/F
8.910 0.591 tNET RR 1 R6C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_10_s0/CE

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R6C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_10_s0/CLK
40.148 -0.032 tSu 1 R6C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_10_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 9
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 4.439, 50.844%; route: 3.952, 45.266%; tC2Q: 0.340, 3.890%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path11

Path Summary:

Slack 31.238
Data Arrival Time 8.910
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_11_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/CLK
0.520 0.340 tC2Q RF 2 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q
1.118 0.598 tNET FF 1 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/I2
1.728 0.609 tINS FF 5 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/F
2.465 0.737 tNET FF 1 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/I2
2.929 0.464 tINS FF 4 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/F
2.945 0.016 tNET FF 1 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/I2
3.759 0.814 tINS FF 3 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/F
3.771 0.012 tNET FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/I2
4.536 0.765 tINS FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/F
5.144 0.608 tNET FF 2 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/I1
5.919 0.774 tINS FF 1 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/COUT
5.919 0.000 tNET FF 2 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/CIN
5.961 0.042 tINS FF 1 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/COUT
5.961 0.000 tNET FF 2 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/CIN
6.003 0.042 tINS FF 1 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/COUT
6.003 0.000 tNET FF 2 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/CIN
6.045 0.042 tINS FF 1 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/COUT
6.045 0.000 tNET FF 2 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/CIN
6.088 0.042 tINS FF 1 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/COUT
6.088 0.000 tNET FF 2 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/CIN
6.130 0.042 tINS FF 1 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/COUT
6.130 0.000 tNET FF 2 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/CIN
6.172 0.042 tINS FF 1 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/COUT
6.172 0.000 tNET FF 2 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/CIN
6.214 0.042 tINS FF 1 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/COUT
6.214 0.000 tNET FF 2 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/CIN
6.257 0.042 tINS FF 1 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/COUT
6.257 0.000 tNET FF 2 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/CIN
6.299 0.042 tINS FF 1 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/COUT
6.299 0.000 tNET FF 2 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/CIN
6.341 0.042 tINS FF 1 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/COUT
6.341 0.000 tNET FF 2 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/CIN
6.383 0.042 tINS FF 1 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/COUT
6.383 0.000 tNET FF 2 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/CIN
6.425 0.042 tINS FF 1 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/COUT
6.425 0.000 tNET FF 2 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/CIN
6.468 0.042 tINS FF 5 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/COUT
7.856 1.389 tNET FF 1 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/I1
8.319 0.463 tINS FR 13 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/F
8.910 0.591 tNET RR 1 R6C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_11_s0/CE

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R6C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_11_s0/CLK
40.148 -0.032 tSu 1 R6C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_11_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 9
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 4.439, 50.844%; route: 3.952, 45.266%; tC2Q: 0.340, 3.890%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path12

Path Summary:

Slack 31.245
Data Arrival Time 8.904
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_12_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/CLK
0.520 0.340 tC2Q RF 2 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q
1.118 0.598 tNET FF 1 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/I2
1.728 0.609 tINS FF 5 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/F
2.465 0.737 tNET FF 1 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/I2
2.929 0.464 tINS FF 4 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/F
2.945 0.016 tNET FF 1 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/I2
3.759 0.814 tINS FF 3 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/F
3.771 0.012 tNET FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/I2
4.536 0.765 tINS FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/F
5.144 0.608 tNET FF 2 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/I1
5.919 0.774 tINS FF 1 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/COUT
5.919 0.000 tNET FF 2 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/CIN
5.961 0.042 tINS FF 1 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/COUT
5.961 0.000 tNET FF 2 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/CIN
6.003 0.042 tINS FF 1 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/COUT
6.003 0.000 tNET FF 2 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/CIN
6.045 0.042 tINS FF 1 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/COUT
6.045 0.000 tNET FF 2 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/CIN
6.088 0.042 tINS FF 1 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/COUT
6.088 0.000 tNET FF 2 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/CIN
6.130 0.042 tINS FF 1 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/COUT
6.130 0.000 tNET FF 2 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/CIN
6.172 0.042 tINS FF 1 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/COUT
6.172 0.000 tNET FF 2 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/CIN
6.214 0.042 tINS FF 1 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/COUT
6.214 0.000 tNET FF 2 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/CIN
6.257 0.042 tINS FF 1 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/COUT
6.257 0.000 tNET FF 2 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/CIN
6.299 0.042 tINS FF 1 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/COUT
6.299 0.000 tNET FF 2 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/CIN
6.341 0.042 tINS FF 1 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/COUT
6.341 0.000 tNET FF 2 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/CIN
6.383 0.042 tINS FF 1 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/COUT
6.383 0.000 tNET FF 2 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/CIN
6.425 0.042 tINS FF 1 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/COUT
6.425 0.000 tNET FF 2 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/CIN
6.468 0.042 tINS FF 5 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/COUT
7.856 1.389 tNET FF 1 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/I1
8.319 0.463 tINS FR 13 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/F
8.904 0.584 tNET RR 1 R6C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_12_s0/CE

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R6C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_12_s0/CLK
40.148 -0.032 tSu 1 R6C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_12_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 9
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 4.439, 50.883%; route: 3.945, 45.223%; tC2Q: 0.340, 3.893%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path13

Path Summary:

Slack 31.245
Data Arrival Time 8.904
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_13_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/CLK
0.520 0.340 tC2Q RF 2 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q
1.118 0.598 tNET FF 1 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/I2
1.728 0.609 tINS FF 5 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/F
2.465 0.737 tNET FF 1 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/I2
2.929 0.464 tINS FF 4 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/F
2.945 0.016 tNET FF 1 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/I2
3.759 0.814 tINS FF 3 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/F
3.771 0.012 tNET FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/I2
4.536 0.765 tINS FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/F
5.144 0.608 tNET FF 2 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/I1
5.919 0.774 tINS FF 1 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/COUT
5.919 0.000 tNET FF 2 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/CIN
5.961 0.042 tINS FF 1 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/COUT
5.961 0.000 tNET FF 2 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/CIN
6.003 0.042 tINS FF 1 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/COUT
6.003 0.000 tNET FF 2 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/CIN
6.045 0.042 tINS FF 1 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/COUT
6.045 0.000 tNET FF 2 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/CIN
6.088 0.042 tINS FF 1 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/COUT
6.088 0.000 tNET FF 2 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/CIN
6.130 0.042 tINS FF 1 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/COUT
6.130 0.000 tNET FF 2 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/CIN
6.172 0.042 tINS FF 1 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/COUT
6.172 0.000 tNET FF 2 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/CIN
6.214 0.042 tINS FF 1 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/COUT
6.214 0.000 tNET FF 2 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/CIN
6.257 0.042 tINS FF 1 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/COUT
6.257 0.000 tNET FF 2 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/CIN
6.299 0.042 tINS FF 1 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/COUT
6.299 0.000 tNET FF 2 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/CIN
6.341 0.042 tINS FF 1 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/COUT
6.341 0.000 tNET FF 2 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/CIN
6.383 0.042 tINS FF 1 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/COUT
6.383 0.000 tNET FF 2 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/CIN
6.425 0.042 tINS FF 1 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/COUT
6.425 0.000 tNET FF 2 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/CIN
6.468 0.042 tINS FF 5 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/COUT
7.856 1.389 tNET FF 1 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/I1
8.319 0.463 tINS FR 13 R7C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n72_s2/F
8.904 0.584 tNET RR 1 R6C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_13_s0/CE

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R6C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_13_s0/CLK
40.148 -0.032 tSu 1 R6C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_13_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 9
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 4.439, 50.883%; route: 3.945, 45.223%; tC2Q: 0.340, 3.893%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path14

Path Summary:

Slack 31.564
Data Arrival Time 8.320
Data Required Time 39.884
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_0_s3
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/CLK
0.520 0.340 tC2Q RF 2 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q
1.118 0.598 tNET FF 1 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/I2
1.728 0.609 tINS FF 5 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/F
2.465 0.737 tNET FF 1 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/I2
2.929 0.464 tINS FF 4 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/F
2.945 0.016 tNET FF 1 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/I2
3.759 0.814 tINS FF 3 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/F
3.771 0.012 tNET FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/I2
4.536 0.765 tINS FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/F
5.144 0.608 tNET FF 2 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/I1
5.919 0.774 tINS FF 1 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/COUT
5.919 0.000 tNET FF 2 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/CIN
5.961 0.042 tINS FF 1 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/COUT
5.961 0.000 tNET FF 2 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/CIN
6.003 0.042 tINS FF 1 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/COUT
6.003 0.000 tNET FF 2 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/CIN
6.045 0.042 tINS FF 1 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/COUT
6.045 0.000 tNET FF 2 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/CIN
6.088 0.042 tINS FF 1 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/COUT
6.088 0.000 tNET FF 2 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/CIN
6.130 0.042 tINS FF 1 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/COUT
6.130 0.000 tNET FF 2 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/CIN
6.172 0.042 tINS FF 1 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/COUT
6.172 0.000 tNET FF 2 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/CIN
6.214 0.042 tINS FF 1 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/COUT
6.214 0.000 tNET FF 2 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/CIN
6.257 0.042 tINS FF 1 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/COUT
6.257 0.000 tNET FF 2 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/CIN
6.299 0.042 tINS FF 1 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/COUT
6.299 0.000 tNET FF 2 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/CIN
6.341 0.042 tINS FF 1 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/COUT
6.341 0.000 tNET FF 2 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/CIN
6.383 0.042 tINS FF 1 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/COUT
6.383 0.000 tNET FF 2 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/CIN
6.425 0.042 tINS FF 1 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/COUT
6.425 0.000 tNET FF 2 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/CIN
6.468 0.042 tINS FF 5 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/COUT
7.856 1.389 tNET FF 1 R9C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n87_s3/I2
8.320 0.464 tINS FF 1 R9C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n87_s3/F
8.320 0.000 tNET FF 1 R9C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_0_s3/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R9C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_0_s3/CLK
39.884 -0.296 tSu 1 R9C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_0_s3

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 9
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 4.439, 54.540%; route: 3.361, 41.288%; tC2Q: 0.340, 4.173%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path15

Path Summary:

Slack 31.573
Data Arrival Time 8.312
Data Required Time 39.884
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_curr_0_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/CLK
0.520 0.340 tC2Q RF 2 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q
1.118 0.598 tNET FF 1 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/I2
1.728 0.609 tINS FF 5 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/F
2.465 0.737 tNET FF 1 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/I2
2.929 0.464 tINS FF 4 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/F
2.945 0.016 tNET FF 1 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/I2
3.759 0.814 tINS FF 3 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/F
3.771 0.012 tNET FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/I2
4.536 0.765 tINS FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/F
5.144 0.608 tNET FF 2 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/I1
5.919 0.774 tINS FF 1 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/COUT
5.919 0.000 tNET FF 2 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/CIN
5.961 0.042 tINS FF 1 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/COUT
5.961 0.000 tNET FF 2 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/CIN
6.003 0.042 tINS FF 1 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/COUT
6.003 0.000 tNET FF 2 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/CIN
6.045 0.042 tINS FF 1 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/COUT
6.045 0.000 tNET FF 2 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/CIN
6.088 0.042 tINS FF 1 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/COUT
6.088 0.000 tNET FF 2 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/CIN
6.130 0.042 tINS FF 1 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/COUT
6.130 0.000 tNET FF 2 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/CIN
6.172 0.042 tINS FF 1 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/COUT
6.172 0.000 tNET FF 2 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/CIN
6.214 0.042 tINS FF 1 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/COUT
6.214 0.000 tNET FF 2 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/CIN
6.257 0.042 tINS FF 1 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/COUT
6.257 0.000 tNET FF 2 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/CIN
6.299 0.042 tINS FF 1 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/COUT
6.299 0.000 tNET FF 2 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/CIN
6.341 0.042 tINS FF 1 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/COUT
6.341 0.000 tNET FF 2 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/CIN
6.383 0.042 tINS FF 1 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/COUT
6.383 0.000 tNET FF 2 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/CIN
6.425 0.042 tINS FF 1 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/COUT
6.425 0.000 tNET FF 2 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/CIN
6.468 0.042 tINS FF 5 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/COUT
7.497 1.029 tNET FF 1 R11C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_next_0_s9/I0
8.312 0.814 tINS FF 1 R11C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_next_0_s9/F
8.312 0.000 tNET FF 1 R11C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_curr_0_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R11C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_curr_0_s0/CLK
39.884 -0.296 tSu 1 R11C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_curr_0_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 9
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 4.790, 58.908%; route: 3.002, 36.915%; tC2Q: 0.340, 4.177%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path16

Path Summary:

Slack 31.622
Data Arrival Time 8.262
Data Required Time 39.884
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rden_d0_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/CLK
0.520 0.340 tC2Q RF 2 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q
1.118 0.598 tNET FF 1 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/I2
1.728 0.609 tINS FF 5 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/F
2.465 0.737 tNET FF 1 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/I2
2.929 0.464 tINS FF 4 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/F
2.945 0.016 tNET FF 1 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/I2
3.759 0.814 tINS FF 3 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/F
3.771 0.012 tNET FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/I2
4.536 0.765 tINS FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/F
5.144 0.608 tNET FF 2 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/I1
5.919 0.774 tINS FF 1 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/COUT
5.919 0.000 tNET FF 2 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/CIN
5.961 0.042 tINS FF 1 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/COUT
5.961 0.000 tNET FF 2 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/CIN
6.003 0.042 tINS FF 1 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/COUT
6.003 0.000 tNET FF 2 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/CIN
6.045 0.042 tINS FF 1 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/COUT
6.045 0.000 tNET FF 2 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/CIN
6.088 0.042 tINS FF 1 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/COUT
6.088 0.000 tNET FF 2 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/CIN
6.130 0.042 tINS FF 1 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/COUT
6.130 0.000 tNET FF 2 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/CIN
6.172 0.042 tINS FF 1 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/COUT
6.172 0.000 tNET FF 2 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/CIN
6.214 0.042 tINS FF 1 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/COUT
6.214 0.000 tNET FF 2 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/CIN
6.257 0.042 tINS FF 1 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/COUT
6.257 0.000 tNET FF 2 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/CIN
6.299 0.042 tINS FF 1 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/COUT
6.299 0.000 tNET FF 2 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/CIN
6.341 0.042 tINS FF 1 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/COUT
6.341 0.000 tNET FF 2 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/CIN
6.383 0.042 tINS FF 1 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/COUT
6.383 0.000 tNET FF 2 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/CIN
6.425 0.042 tINS FF 1 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/COUT
6.425 0.000 tNET FF 2 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/CIN
6.468 0.042 tINS FF 5 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/COUT
7.497 1.029 tNET FF 1 R9C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/n575_s1/I2
8.262 0.765 tINS FF 1 R9C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/n575_s1/F
8.262 0.000 tNET FF 1 R9C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rden_d0_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R9C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rden_d0_s0/CLK
39.884 -0.296 tSu 1 R9C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rden_d0_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 9
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 4.740, 58.655%; route: 3.002, 37.142%; tC2Q: 0.340, 4.203%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path17

Path Summary:

Slack 31.923
Data Arrival Time 7.961
Data Required Time 39.884
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_curr_1_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/CLK
0.520 0.340 tC2Q RF 2 R6C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_grey_d1_11_s0/Q
1.118 0.598 tNET FF 1 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/I2
1.728 0.609 tINS FF 5 R9C7[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_10_s0/F
2.465 0.737 tNET FF 1 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/I2
2.929 0.464 tINS FF 4 R9C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_8_s0/F
2.945 0.016 tNET FF 1 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/I2
3.759 0.814 tINS FF 3 R9C10[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_2_s0/F
3.771 0.012 tNET FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/I2
4.536 0.765 tINS FF 1 R9C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_d1_0_s0/F
5.144 0.608 tNET FF 2 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/I1
5.919 0.774 tINS FF 1 R8C10[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n255_s0/COUT
5.919 0.000 tNET FF 2 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/CIN
5.961 0.042 tINS FF 1 R8C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n256_s0/COUT
5.961 0.000 tNET FF 2 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/CIN
6.003 0.042 tINS FF 1 R8C10[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n257_s0/COUT
6.003 0.000 tNET FF 2 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/CIN
6.045 0.042 tINS FF 1 R8C10[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n258_s0/COUT
6.045 0.000 tNET FF 2 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/CIN
6.088 0.042 tINS FF 1 R8C10[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n259_s0/COUT
6.088 0.000 tNET FF 2 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/CIN
6.130 0.042 tINS FF 1 R8C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n260_s0/COUT
6.130 0.000 tNET FF 2 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/CIN
6.172 0.042 tINS FF 1 R8C11[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n261_s0/COUT
6.172 0.000 tNET FF 2 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/CIN
6.214 0.042 tINS FF 1 R8C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n262_s0/COUT
6.214 0.000 tNET FF 2 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/CIN
6.257 0.042 tINS FF 1 R8C11[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n263_s0/COUT
6.257 0.000 tNET FF 2 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/CIN
6.299 0.042 tINS FF 1 R8C11[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n264_s0/COUT
6.299 0.000 tNET FF 2 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/CIN
6.341 0.042 tINS FF 1 R8C11[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n265_s0/COUT
6.341 0.000 tNET FF 2 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/CIN
6.383 0.042 tINS FF 1 R8C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n266_s0/COUT
6.383 0.000 tNET FF 2 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/CIN
6.425 0.042 tINS FF 1 R8C12[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n267_s0/COUT
6.425 0.000 tNET FF 2 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/CIN
6.468 0.042 tINS FF 5 R8C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n268_s0/COUT
7.497 1.029 tNET FF 1 R11C12[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_next_1_s7/I0
7.961 0.464 tINS FF 1 R11C12[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_next_1_s7/F
7.961 0.000 tNET FF 1 R11C12[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_curr_1_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R11C12[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_curr_1_s0/CLK
39.884 -0.296 tSu 1 R11C12[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_curr_1_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 9
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 4.439, 57.057%; route: 3.002, 38.578%; tC2Q: 0.340, 4.365%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path18

Path Summary:

Slack 32.382
Data Arrival Time 7.502
Data Required Time 39.884
From led_cnt_7_s0
To led_cnt_28_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R13C5[0][B] led_cnt_7_s0/CLK
0.520 0.340 tC2Q RF 3 R13C5[0][B] led_cnt_7_s0/Q
1.614 1.094 tNET FF 1 R7C5[1][B] n81_s4/I3
2.379 0.765 tINS FF 4 R7C5[1][B] n81_s4/F
3.231 0.852 tNET FF 1 R13C5[2][B] n76_s3/I2
3.840 0.609 tINS FF 10 R13C5[2][B] n76_s3/F
4.949 1.109 tNET FF 1 R8C5[1][A] n66_s3/I2
5.764 0.814 tINS FF 9 R8C5[1][A] n66_s3/F
6.737 0.973 tNET FF 1 R11C6[2][A] n61_s2/I1
7.502 0.765 tINS FF 1 R11C6[2][A] n61_s2/F
7.502 0.000 tNET FF 1 R11C6[2][A] led_cnt_28_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R11C6[2][A] led_cnt_28_s0/CLK
39.884 -0.296 tSu 1 R11C6[2][A] led_cnt_28_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 5
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.953, 40.333%; route: 4.029, 55.028%; tC2Q: 0.340, 4.639%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path19

Path Summary:

Slack 32.382
Data Arrival Time 7.502
Data Required Time 39.884
From led_cnt_7_s0
To led_cnt_29_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R13C5[0][B] led_cnt_7_s0/CLK
0.520 0.340 tC2Q RF 3 R13C5[0][B] led_cnt_7_s0/Q
1.614 1.094 tNET FF 1 R7C5[1][B] n81_s4/I3
2.379 0.765 tINS FF 4 R7C5[1][B] n81_s4/F
3.231 0.852 tNET FF 1 R13C5[2][B] n76_s3/I2
3.840 0.609 tINS FF 10 R13C5[2][B] n76_s3/F
4.949 1.109 tNET FF 1 R8C5[1][A] n66_s3/I2
5.764 0.814 tINS FF 9 R8C5[1][A] n66_s3/F
6.737 0.973 tNET FF 1 R11C6[0][A] n60_s2/I0
7.502 0.765 tINS FF 1 R11C6[0][A] n60_s2/F
7.502 0.000 tNET FF 1 R11C6[0][A] led_cnt_29_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R11C6[0][A] led_cnt_29_s0/CLK
39.884 -0.296 tSu 1 R11C6[0][A] led_cnt_29_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 5
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.953, 40.333%; route: 4.029, 55.028%; tC2Q: 0.340, 4.639%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path20

Path Summary:

Slack 32.382
Data Arrival Time 7.502
Data Required Time 39.884
From led_cnt_7_s0
To led_cnt_30_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R13C5[0][B] led_cnt_7_s0/CLK
0.520 0.340 tC2Q RF 3 R13C5[0][B] led_cnt_7_s0/Q
1.614 1.094 tNET FF 1 R7C5[1][B] n81_s4/I3
2.379 0.765 tINS FF 4 R7C5[1][B] n81_s4/F
3.231 0.852 tNET FF 1 R13C5[2][B] n76_s3/I2
3.840 0.609 tINS FF 10 R13C5[2][B] n76_s3/F
4.949 1.109 tNET FF 1 R8C5[1][A] n66_s3/I2
5.764 0.814 tINS FF 9 R8C5[1][A] n66_s3/F
6.737 0.973 tNET FF 1 R11C6[1][B] n59_s2/I1
7.502 0.765 tINS FF 1 R11C6[1][B] n59_s2/F
7.502 0.000 tNET FF 1 R11C6[1][B] led_cnt_30_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R11C6[1][B] led_cnt_30_s0/CLK
39.884 -0.296 tSu 1 R11C6[1][B] led_cnt_30_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 5
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.953, 40.333%; route: 4.029, 55.028%; tC2Q: 0.340, 4.639%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path21

Path Summary:

Slack 32.548
Data Arrival Time 7.336
Data Required Time 39.884
From led_cnt_7_s0
To led_cnt_31_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R13C5[0][B] led_cnt_7_s0/CLK
0.520 0.340 tC2Q RF 3 R13C5[0][B] led_cnt_7_s0/Q
1.614 1.094 tNET FF 1 R7C5[1][B] n81_s4/I3
2.379 0.765 tINS FF 4 R7C5[1][B] n81_s4/F
3.231 0.852 tNET FF 1 R13C5[2][B] n76_s3/I2
3.840 0.609 tINS FF 10 R13C5[2][B] n76_s3/F
4.949 1.109 tNET FF 1 R8C5[1][A] n66_s3/I2
5.764 0.814 tINS FF 9 R8C5[1][A] n66_s3/F
6.727 0.963 tNET FF 1 R11C6[0][B] n58_s2/I0
7.336 0.609 tINS FF 1 R11C6[0][B] n58_s2/F
7.336 0.000 tNET FF 1 R11C6[0][B] led_cnt_31_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R11C6[0][B] led_cnt_31_s0/CLK
39.884 -0.296 tSu 1 R11C6[0][B] led_cnt_31_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 5
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.797, 39.092%; route: 4.019, 56.161%; tC2Q: 0.340, 4.746%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path22

Path Summary:

Slack 32.572
Data Arrival Time 7.312
Data Required Time 39.884
From led_cnt_7_s0
To led_cnt_27_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R13C5[0][B] led_cnt_7_s0/CLK
0.520 0.340 tC2Q RF 3 R13C5[0][B] led_cnt_7_s0/Q
1.614 1.094 tNET FF 1 R7C5[1][B] n81_s4/I3
2.379 0.765 tINS FF 4 R7C5[1][B] n81_s4/F
3.231 0.852 tNET FF 1 R13C5[2][B] n76_s3/I2
3.840 0.609 tINS FF 10 R13C5[2][B] n76_s3/F
4.949 1.109 tNET FF 1 R8C5[1][A] n66_s3/I2
5.764 0.814 tINS FF 9 R8C5[1][A] n66_s3/F
6.497 0.734 tNET FF 1 R12C5[1][A] n62_s2/I0
7.312 0.814 tINS FF 1 R12C5[1][A] n62_s2/F
7.312 0.000 tNET FF 1 R12C5[1][A] led_cnt_27_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R12C5[1][A] led_cnt_27_s0/CLK
39.884 -0.296 tSu 1 R12C5[1][A] led_cnt_27_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 5
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 3.003, 42.104%; route: 3.789, 53.134%; tC2Q: 0.340, 4.762%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path23

Path Summary:

Slack 32.651
Data Arrival Time 7.233
Data Required Time 39.884
From led_cnt_7_s0
To led_cnt_23_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R13C5[0][B] led_cnt_7_s0/CLK
0.520 0.340 tC2Q RF 3 R13C5[0][B] led_cnt_7_s0/Q
1.614 1.094 tNET FF 1 R7C5[1][B] n81_s4/I3
2.379 0.765 tINS FF 4 R7C5[1][B] n81_s4/F
3.231 0.852 tNET FF 1 R13C5[2][B] n76_s3/I2
3.840 0.609 tINS FF 10 R13C5[2][B] n76_s3/F
4.949 1.109 tNET FF 1 R8C5[1][A] n66_s3/I2
5.764 0.814 tINS FF 9 R8C5[1][A] n66_s3/F
6.624 0.860 tNET FF 1 R11C5[0][B] n66_s2/I1
7.233 0.609 tINS FF 1 R11C5[0][B] n66_s2/F
7.233 0.000 tNET FF 1 R11C5[0][B] led_cnt_23_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R11C5[0][B] led_cnt_23_s0/CLK
39.884 -0.296 tSu 1 R11C5[0][B] led_cnt_23_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 5
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.797, 39.665%; route: 3.915, 55.519%; tC2Q: 0.340, 4.816%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path24

Path Summary:

Slack 32.651
Data Arrival Time 7.233
Data Required Time 39.884
From led_cnt_7_s0
To led_cnt_24_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R13C5[0][B] led_cnt_7_s0/CLK
0.520 0.340 tC2Q RF 3 R13C5[0][B] led_cnt_7_s0/Q
1.614 1.094 tNET FF 1 R7C5[1][B] n81_s4/I3
2.379 0.765 tINS FF 4 R7C5[1][B] n81_s4/F
3.231 0.852 tNET FF 1 R13C5[2][B] n76_s3/I2
3.840 0.609 tINS FF 10 R13C5[2][B] n76_s3/F
4.949 1.109 tNET FF 1 R8C5[1][A] n66_s3/I2
5.764 0.814 tINS FF 9 R8C5[1][A] n66_s3/F
6.624 0.860 tNET FF 1 R11C5[1][A] n65_s2/I1
7.233 0.609 tINS FF 1 R11C5[1][A] n65_s2/F
7.233 0.000 tNET FF 1 R11C5[1][A] led_cnt_24_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R11C5[1][A] led_cnt_24_s0/CLK
39.884 -0.296 tSu 1 R11C5[1][A] led_cnt_24_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 5
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.797, 39.665%; route: 3.915, 55.519%; tC2Q: 0.340, 4.816%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path25

Path Summary:

Slack 32.774
Data Arrival Time 7.110
Data Required Time 39.884
From led_cnt_7_s0
To led_cnt_26_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R13C5[0][B] led_cnt_7_s0/CLK
0.520 0.340 tC2Q RF 3 R13C5[0][B] led_cnt_7_s0/Q
1.614 1.094 tNET FF 1 R7C5[1][B] n81_s4/I3
2.379 0.765 tINS FF 4 R7C5[1][B] n81_s4/F
3.231 0.852 tNET FF 1 R13C5[2][B] n76_s3/I2
3.840 0.609 tINS FF 10 R13C5[2][B] n76_s3/F
4.949 1.109 tNET FF 1 R8C5[1][A] n66_s3/I2
5.764 0.814 tINS FF 9 R8C5[1][A] n66_s3/F
6.501 0.737 tNET FF 1 R12C5[3][A] n63_s2/I1
7.110 0.609 tINS FF 1 R12C5[3][A] n63_s2/F
7.110 0.000 tNET FF 1 R12C5[3][A] led_cnt_26_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R12C5[3][A] led_cnt_26_s0/CLK
39.884 -0.296 tSu 1 R12C5[3][A] led_cnt_26_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 5
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.797, 40.368%; route: 3.793, 54.731%; tC2Q: 0.340, 4.901%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Hold Analysis Report

Report Command:report_timing -hold -max_paths 25 -max_common_paths 1

Path1

Path Summary:

Slack 0.524
Data Arrival Time 0.661
Data Required Time 0.136
From inst_JTAG_HUB/inst_goConfig_JTAG/u_tms/cnt_1_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_tms/cnt_1_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R5C10[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_tms/cnt_1_s0/CLK
0.383 0.247 tC2Q RR 2 R5C10[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_tms/cnt_1_s0/Q
0.385 0.002 tNET RR 1 R5C10[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_tms/n23_s2/I3
0.661 0.276 tINS RF 1 R5C10[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_tms/n23_s2/F
0.661 0.000 tNET FF 1 R5C10[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_tms/cnt_1_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R5C10[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_tms/cnt_1_s0/CLK
0.136 0.000 tHld 1 R5C10[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_tms/cnt_1_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.565%; route: 0.002, 0.334%; tC2Q: 0.247, 47.101%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path2

Path Summary:

Slack 0.524
Data Arrival Time 0.661
Data Required Time 0.136
From inst_JTAG_HUB/inst_goConfig_JTAG/u_tck/cnt_1_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_tck/cnt_1_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R5C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_tck/cnt_1_s0/CLK
0.383 0.247 tC2Q RR 2 R5C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_tck/cnt_1_s0/Q
0.385 0.002 tNET RR 1 R5C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_tck/n23_s2/I3
0.661 0.276 tINS RF 1 R5C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_tck/n23_s2/F
0.661 0.000 tNET FF 1 R5C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_tck/cnt_1_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R5C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_tck/cnt_1_s0/CLK
0.136 0.000 tHld 1 R5C10[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_tck/cnt_1_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.565%; route: 0.002, 0.334%; tC2Q: 0.247, 47.101%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path3

Path Summary:

Slack 0.524
Data Arrival Time 0.661
Data Required Time 0.136
From led_cnt_10_s0
To led_cnt_10_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R13C5[1][A] led_cnt_10_s0/CLK
0.383 0.247 tC2Q RR 4 R13C5[1][A] led_cnt_10_s0/Q
0.385 0.002 tNET RR 1 R13C5[1][A] n79_s2/I0
0.661 0.276 tINS RF 1 R13C5[1][A] n79_s2/F
0.661 0.000 tNET FF 1 R13C5[1][A] led_cnt_10_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R13C5[1][A] led_cnt_10_s0/CLK
0.136 0.000 tHld 1 R13C5[1][A] led_cnt_10_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.565%; route: 0.002, 0.334%; tC2Q: 0.247, 47.101%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path4

Path Summary:

Slack 0.524
Data Arrival Time 0.661
Data Required Time 0.136
From led_cnt_21_s0
To led_cnt_21_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C5[0][A] led_cnt_21_s0/CLK
0.383 0.247 tC2Q RR 2 R8C5[0][A] led_cnt_21_s0/Q
0.385 0.002 tNET RR 1 R8C5[0][A] n68_s2/I3
0.661 0.276 tINS RF 1 R8C5[0][A] n68_s2/F
0.661 0.000 tNET FF 1 R8C5[0][A] led_cnt_21_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C5[0][A] led_cnt_21_s0/CLK
0.136 0.000 tHld 1 R8C5[0][A] led_cnt_21_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.565%; route: 0.002, 0.334%; tC2Q: 0.247, 47.101%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path5

Path Summary:

Slack 0.525
Data Arrival Time 0.662
Data Required Time 0.136
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_0_s2
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_0_s2
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R14C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_0_s2/CLK
0.383 0.247 tC2Q RR 3 R14C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_0_s2/Q
0.386 0.003 tNET RR 1 R14C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/n39_s3/I0
0.662 0.276 tINS RF 1 R14C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/n39_s3/F
0.662 0.000 tNET FF 1 R14C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_0_s2/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R14C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_0_s2/CLK
0.136 0.000 tHld 1 R14C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_0_s2

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.478%; route: 0.003, 0.500%; tC2Q: 0.247, 47.023%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path6

Path Summary:

Slack 0.525
Data Arrival Time 0.662
Data Required Time 0.136
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_2_5M_s1
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_2_5M_s1
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R7C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_2_5M_s1/CLK
0.383 0.247 tC2Q RR 3 R7C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_2_5M_s1/Q
0.386 0.003 tNET RR 1 R7C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/n991_s2/I0
0.662 0.276 tINS RF 1 R7C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/n991_s2/F
0.662 0.000 tNET FF 1 R7C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_2_5M_s1/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R7C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_2_5M_s1/CLK
0.136 0.000 tHld 1 R7C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_2_5M_s1

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.478%; route: 0.003, 0.500%; tC2Q: 0.247, 47.023%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path7

Path Summary:

Slack 0.525
Data Arrival Time 0.662
Data Required Time 0.136
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_1_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_1_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R7C13[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_1_s0/CLK
0.383 0.247 tC2Q RR 5 R7C13[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_1_s0/Q
0.386 0.003 tNET RR 1 R7C13[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/n989_s2/I1
0.662 0.276 tINS RF 1 R7C13[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/n989_s2/F
0.662 0.000 tNET FF 1 R7C13[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_1_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R7C13[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_1_s0/CLK
0.136 0.000 tHld 1 R7C13[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_1_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.478%; route: 0.003, 0.500%; tC2Q: 0.247, 47.023%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path8

Path Summary:

Slack 0.525
Data Arrival Time 0.662
Data Required Time 0.136
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_3_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_3_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R7C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_3_s0/CLK
0.383 0.247 tC2Q RR 4 R7C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_3_s0/Q
0.386 0.003 tNET RR 1 R7C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/n987_s2/I3
0.662 0.276 tINS RF 1 R7C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/n987_s2/F
0.662 0.000 tNET FF 1 R7C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_3_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R7C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_3_s0/CLK
0.136 0.000 tHld 1 R7C12[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_3_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.478%; route: 0.003, 0.500%; tC2Q: 0.247, 47.023%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path9

Path Summary:

Slack 0.525
Data Arrival Time 0.662
Data Required Time 0.136
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_7_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R7C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_7_s0/CLK
0.383 0.247 tC2Q RR 8 R7C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_7_s0/Q
0.386 0.003 tNET RR 1 R7C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/n471_s4/I0
0.662 0.276 tINS RF 1 R7C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/n471_s4/F
0.662 0.000 tNET FF 1 R7C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_7_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R7C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_7_s0/CLK
0.136 0.000 tHld 1 R7C11[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_7_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.478%; route: 0.003, 0.500%; tC2Q: 0.247, 47.023%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path10

Path Summary:

Slack 0.525
Data Arrival Time 0.662
Data Required Time 0.136
From led_cnt_1_s0
To led_cnt_1_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R7C5[1][A] led_cnt_1_s0/CLK
0.383 0.247 tC2Q RR 4 R7C5[1][A] led_cnt_1_s0/Q
0.386 0.003 tNET RR 1 R7C5[1][A] n88_s2/I1
0.662 0.276 tINS RF 1 R7C5[1][A] n88_s2/F
0.662 0.000 tNET FF 1 R7C5[1][A] led_cnt_1_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R7C5[1][A] led_cnt_1_s0/CLK
0.136 0.000 tHld 1 R7C5[1][A] led_cnt_1_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.478%; route: 0.003, 0.500%; tC2Q: 0.247, 47.023%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path11

Path Summary:

Slack 0.525
Data Arrival Time 0.662
Data Required Time 0.136
From led_cnt_2_s0
To led_cnt_2_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R6C5[0][A] led_cnt_2_s0/CLK
0.383 0.247 tC2Q RR 3 R6C5[0][A] led_cnt_2_s0/Q
0.386 0.003 tNET RR 1 R6C5[0][A] n87_s2/I2
0.662 0.276 tINS RF 1 R6C5[0][A] n87_s2/F
0.662 0.000 tNET FF 1 R6C5[0][A] led_cnt_2_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R6C5[0][A] led_cnt_2_s0/CLK
0.136 0.000 tHld 1 R6C5[0][A] led_cnt_2_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.478%; route: 0.003, 0.500%; tC2Q: 0.247, 47.023%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path12

Path Summary:

Slack 0.525
Data Arrival Time 0.662
Data Required Time 0.136
From led_cnt_6_s0
To led_cnt_6_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R13C5[0][A] led_cnt_6_s0/CLK
0.383 0.247 tC2Q RR 4 R13C5[0][A] led_cnt_6_s0/Q
0.386 0.003 tNET RR 1 R13C5[0][A] n83_s2/I1
0.662 0.276 tINS RF 1 R13C5[0][A] n83_s2/F
0.662 0.000 tNET FF 1 R13C5[0][A] led_cnt_6_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R13C5[0][A] led_cnt_6_s0/CLK
0.136 0.000 tHld 1 R13C5[0][A] led_cnt_6_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.478%; route: 0.003, 0.500%; tC2Q: 0.247, 47.023%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path13

Path Summary:

Slack 0.525
Data Arrival Time 0.662
Data Required Time 0.136
From led_cnt_9_s0
To led_cnt_9_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R6C5[1][A] led_cnt_9_s0/CLK
0.383 0.247 tC2Q RR 4 R6C5[1][A] led_cnt_9_s0/Q
0.386 0.003 tNET RR 1 R6C5[1][A] n80_s3/I3
0.662 0.276 tINS RF 1 R6C5[1][A] n80_s3/F
0.662 0.000 tNET FF 1 R6C5[1][A] led_cnt_9_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R6C5[1][A] led_cnt_9_s0/CLK
0.136 0.000 tHld 1 R6C5[1][A] led_cnt_9_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.478%; route: 0.003, 0.500%; tC2Q: 0.247, 47.023%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path14

Path Summary:

Slack 0.525
Data Arrival Time 0.662
Data Required Time 0.136
From led_cnt_16_s0
To led_cnt_16_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R9C5[0][A] led_cnt_16_s0/CLK
0.383 0.247 tC2Q RR 3 R9C5[0][A] led_cnt_16_s0/Q
0.386 0.003 tNET RR 1 R9C5[0][A] n73_s2/I1
0.662 0.276 tINS RF 1 R9C5[0][A] n73_s2/F
0.662 0.000 tNET FF 1 R9C5[0][A] led_cnt_16_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R9C5[0][A] led_cnt_16_s0/CLK
0.136 0.000 tHld 1 R9C5[0][A] led_cnt_16_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.478%; route: 0.003, 0.500%; tC2Q: 0.247, 47.023%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path15

Path Summary:

Slack 0.525
Data Arrival Time 0.662
Data Required Time 0.136
From led_cnt_17_s0
To led_cnt_17_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R7C5[0][A] led_cnt_17_s0/CLK
0.383 0.247 tC2Q RR 3 R7C5[0][A] led_cnt_17_s0/Q
0.386 0.003 tNET RR 1 R7C5[0][A] n72_s2/I2
0.662 0.276 tINS RF 1 R7C5[0][A] n72_s2/F
0.662 0.000 tNET FF 1 R7C5[0][A] led_cnt_17_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R7C5[0][A] led_cnt_17_s0/CLK
0.136 0.000 tHld 1 R7C5[0][A] led_cnt_17_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.478%; route: 0.003, 0.500%; tC2Q: 0.247, 47.023%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path16

Path Summary:

Slack 0.525
Data Arrival Time 0.662
Data Required Time 0.136
From led_cnt_27_s0
To led_cnt_27_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R12C5[1][A] led_cnt_27_s0/CLK
0.383 0.247 tC2Q RR 4 R12C5[1][A] led_cnt_27_s0/Q
0.386 0.003 tNET RR 1 R12C5[1][A] n62_s2/I2
0.662 0.276 tINS RF 1 R12C5[1][A] n62_s2/F
0.662 0.000 tNET FF 1 R12C5[1][A] led_cnt_27_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R12C5[1][A] led_cnt_27_s0/CLK
0.136 0.000 tHld 1 R12C5[1][A] led_cnt_27_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.478%; route: 0.003, 0.500%; tC2Q: 0.247, 47.023%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path17

Path Summary:

Slack 0.525
Data Arrival Time 0.662
Data Required Time 0.136
From led_cnt_29_s0
To led_cnt_29_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R11C6[0][A] led_cnt_29_s0/CLK
0.383 0.247 tC2Q RR 4 R11C6[0][A] led_cnt_29_s0/Q
0.386 0.003 tNET RR 1 R11C6[0][A] n60_s2/I2
0.662 0.276 tINS RF 1 R11C6[0][A] n60_s2/F
0.662 0.000 tNET FF 1 R11C6[0][A] led_cnt_29_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R11C6[0][A] led_cnt_29_s0/CLK
0.136 0.000 tHld 1 R11C6[0][A] led_cnt_29_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.478%; route: 0.003, 0.500%; tC2Q: 0.247, 47.023%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path18

Path Summary:

Slack 0.526
Data Arrival Time 0.663
Data Required Time 0.136
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_2_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_2_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R7C13[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_2_s0/CLK
0.383 0.247 tC2Q RR 4 R7C13[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_2_s0/Q
0.387 0.003 tNET RR 1 R7C13[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/n988_s2/I3
0.663 0.276 tINS RF 1 R7C13[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/n988_s2/F
0.663 0.000 tNET FF 1 R7C13[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_2_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R7C13[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_2_s0/CLK
0.136 0.000 tHld 1 R7C13[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clk_div_cnt_2_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.390%; route: 0.003, 0.665%; tC2Q: 0.247, 46.945%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path19

Path Summary:

Slack 0.526
Data Arrival Time 0.663
Data Required Time 0.136
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_1_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_1_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R5C15[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_1_s0/CLK
0.383 0.247 tC2Q RR 9 R5C15[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_1_s0/Q
0.387 0.003 tNET RR 1 R5C15[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/n477_s3/I1
0.663 0.276 tINS RF 1 R5C15[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/n477_s3/F
0.663 0.000 tNET FF 1 R5C15[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_1_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R5C15[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_1_s0/CLK
0.136 0.000 tHld 1 R5C15[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_1_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.390%; route: 0.003, 0.665%; tC2Q: 0.247, 46.945%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path20

Path Summary:

Slack 0.526
Data Arrival Time 0.663
Data Required Time 0.136
From led_cnt_13_s0
To led_cnt_13_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R9C5[1][A] led_cnt_13_s0/CLK
0.383 0.247 tC2Q RR 6 R9C5[1][A] led_cnt_13_s0/Q
0.387 0.003 tNET RR 1 R9C5[1][A] n76_s2/I1
0.663 0.276 tINS RF 1 R9C5[1][A] n76_s2/F
0.663 0.000 tNET FF 1 R9C5[1][A] led_cnt_13_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R9C5[1][A] led_cnt_13_s0/CLK
0.136 0.000 tHld 1 R9C5[1][A] led_cnt_13_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.390%; route: 0.003, 0.665%; tC2Q: 0.247, 46.945%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path21

Path Summary:

Slack 0.526
Data Arrival Time 0.663
Data Required Time 0.136
From led_cnt_24_s0
To led_cnt_24_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R11C5[1][A] led_cnt_24_s0/CLK
0.383 0.247 tC2Q RR 5 R11C5[1][A] led_cnt_24_s0/Q
0.387 0.003 tNET RR 1 R11C5[1][A] n65_s2/I3
0.663 0.276 tINS RF 1 R11C5[1][A] n65_s2/F
0.663 0.000 tNET FF 1 R11C5[1][A] led_cnt_24_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R11C5[1][A] led_cnt_24_s0/CLK
0.136 0.000 tHld 1 R11C5[1][A] led_cnt_24_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.390%; route: 0.003, 0.665%; tC2Q: 0.247, 46.945%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path22

Path Summary:

Slack 0.527
Data Arrival Time 0.664
Data Required Time 0.136
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_12_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_12_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R7C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_12_s0/CLK
0.383 0.247 tC2Q RR 9 R7C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_12_s0/Q
0.388 0.004 tNET RR 1 R7C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/n466_s4/I0
0.664 0.276 tINS RF 1 R7C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/n466_s4/F
0.664 0.000 tNET FF 1 R7C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_12_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R7C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_12_s0/CLK
0.136 0.000 tHld 1 R7C11[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_12_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.303%; route: 0.004, 0.830%; tC2Q: 0.247, 46.867%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path23

Path Summary:

Slack 0.528
Data Arrival Time 0.664
Data Required Time 0.136
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_4_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_4_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R5C15[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_4_s0/CLK
0.383 0.247 tC2Q RR 10 R5C15[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_4_s0/Q
0.389 0.005 tNET RR 1 R5C15[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/n474_s4/I0
0.664 0.276 tINS RF 1 R5C15[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/n474_s4/F
0.664 0.000 tNET FF 1 R5C15[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_4_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R5C15[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_4_s0/CLK
0.136 0.000 tHld 1 R5C15[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/cnt_4_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.217%; route: 0.005, 0.994%; tC2Q: 0.247, 46.789%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path24

Path Summary:

Slack 0.529
Data Arrival Time 0.665
Data Required Time 0.136
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_curr_0_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_curr_0_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R11C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_curr_0_s0/CLK
0.383 0.247 tC2Q RR 20 R11C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_curr_0_s0/Q
0.390 0.006 tNET RR 1 R11C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_next_0_s9/I1
0.665 0.276 tINS RF 1 R11C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_next_0_s9/F
0.665 0.000 tNET FF 1 R11C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_curr_0_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R11C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_curr_0_s0/CLK
0.136 0.000 tHld 1 R11C12[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/st_curr_0_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.276, 52.130%; route: 0.006, 1.158%; tC2Q: 0.247, 46.712%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path25

Path Summary:

Slack 0.541
Data Arrival Time 0.677
Data Required Time 0.136
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_2_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_2_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R14C7[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_2_s0/CLK
0.383 0.247 tC2Q RR 2 R14C7[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_2_s0/Q
0.385 0.002 tNET RR 2 R14C7[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/n37_s/I1
0.677 0.292 tINS RF 1 R14C7[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/n37_s/SUM
0.677 0.000 tNET FF 1 R14C7[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_2_s0/D

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R14C7[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_2_s0/CLK
0.136 0.000 tHld 1 R14C7[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_2_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.292, 53.995%; route: 0.002, 0.324%; tC2Q: 0.247, 45.681%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Recovery Analysis Report

Report Command:report_timing -recovery -max_paths 25 -max_common_paths 1

Path1

Path Summary:

Slack 34.462
Data Arrival Time 5.566
Data Required Time 40.029
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/mem_mem_0_0_s
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 2 BSRAM_R10[1] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/mem_mem_0_0_s/RESETB

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 BSRAM_R10[1] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/mem_mem_0_0_s/CLKB
40.029 -0.152 tSu 1 BSRAM_R10[1] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/mem_mem_0_0_s

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path2

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_0_s3
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R9C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_0_s3/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R9C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_0_s3/CLK
40.148 -0.032 tSu 1 R9C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_0_s3

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path3

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_0_s3
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R7C7[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_0_s3/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R7C7[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_0_s3/CLK
40.148 -0.032 tSu 1 R7C7[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_0_s3

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path4

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/full_flag_r_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R8C7[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/full_flag_r_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R8C7[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/full_flag_r_s0/CLK
40.148 -0.032 tSu 1 R8C7[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/full_flag_r_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path5

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_0_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R7C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_0_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R7C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_0_s0/CLK
40.148 -0.032 tSu 1 R7C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_0_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path6

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_1_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R8C8[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_1_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R8C8[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_1_s0/CLK
40.148 -0.032 tSu 1 R8C8[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_1_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path7

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_2_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R6C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_2_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R6C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_2_s0/CLK
40.148 -0.032 tSu 1 R6C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_2_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path8

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_3_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R8C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_3_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R8C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_3_s0/CLK
40.148 -0.032 tSu 1 R8C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_3_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path9

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_4_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R12C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_4_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R12C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_4_s0/CLK
40.148 -0.032 tSu 1 R12C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_4_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path10

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_5_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R12C7[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_5_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R12C7[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_5_s0/CLK
40.148 -0.032 tSu 1 R12C7[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_5_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path11

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_6_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R12C7[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_6_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R12C7[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_6_s0/CLK
40.148 -0.032 tSu 1 R12C7[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_6_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path12

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_7_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R12C7[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_7_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R12C7[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_7_s0/CLK
40.148 -0.032 tSu 1 R12C7[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_7_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path13

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_8_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R12C8[3][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_8_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R12C8[3][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_8_s0/CLK
40.148 -0.032 tSu 1 R12C8[3][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_8_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path14

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_9_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R13C7[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_9_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R13C7[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_9_s0/CLK
40.148 -0.032 tSu 1 R13C7[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_9_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path15

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_10_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R13C7[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_10_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R13C7[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_10_s0/CLK
40.148 -0.032 tSu 1 R13C7[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_10_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path16

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_11_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R12C7[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_11_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R12C7[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_11_s0/CLK
40.148 -0.032 tSu 1 R12C7[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_11_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path17

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_12_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R12C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_12_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R12C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_12_s0/CLK
40.148 -0.032 tSu 1 R12C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_12_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path18

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_13_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R13C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_13_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R13C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_13_s0/CLK
40.148 -0.032 tSu 1 R13C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_13_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path19

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_0_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R7C7[3][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_0_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R7C7[3][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_0_s0/CLK
40.148 -0.032 tSu 1 R7C7[3][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_0_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path20

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_1_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R7C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_1_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R7C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_1_s0/CLK
40.148 -0.032 tSu 1 R7C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_1_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path21

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_2_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R6C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_2_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R6C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_2_s0/CLK
40.148 -0.032 tSu 1 R6C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_2_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path22

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_3_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R8C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_3_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R8C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_3_s0/CLK
40.148 -0.032 tSu 1 R8C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_3_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path23

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_4_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R12C8[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_4_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R12C8[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_4_s0/CLK
40.148 -0.032 tSu 1 R12C8[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_4_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path24

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_5_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R12C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_5_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R12C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_5_s0/CLK
40.148 -0.032 tSu 1 R12C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_5_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Path25

Path Summary:

Slack 34.582
Data Arrival Time 5.566
Data Required Time 40.148
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_6_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.180 0.180 tNET RR 1 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/CLK
0.520 0.340 tC2Q RR 2 R14C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_7_s0/Q
0.831 0.311 tNET RR 1 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/I1
1.592 0.760 tINS RR 2 R14C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s3/F
1.905 0.313 tNET RR 1 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/I1
2.719 0.814 tINS RF 10 R14C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/rst_cnt_8_s5/F
3.446 0.726 tNET FF 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I0
4.210 0.765 tINS FF 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
5.566 1.356 tNET FF 1 R12C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_6_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
40.000 40.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.180 0.180 tNET RR 1 R12C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_6_s0/CLK
40.148 -0.032 tSu 1 R12C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_6_s0

Path Statistics:

Clock Skew 0.000
Setup Relationship 40.000
Logic Level 4
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%
Arrival Data Path Delay cell: 2.339, 43.436%; route: 2.707, 50.258%; tC2Q: 0.340, 6.306%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.180, 100.000%

Removal Analysis Report

Report Command:report_timing -removal -max_paths 25 -max_common_paths 1

Path1

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/mem_mem_0_0_s
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 2 BSRAM_R10[1] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/mem_mem_0_0_s/RESETB

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 BSRAM_R10[1] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/mem_mem_0_0_s/CLKB
0.146 0.009 tHld 1 BSRAM_R10[1] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/mem_mem_0_0_s

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path2

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_0_s3
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R9C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_0_s3/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R9C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_0_s3/CLK
0.146 0.009 tHld 1 R9C9[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_0_s3

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path3

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_0_s3
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R7C7[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_0_s3/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R7C7[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_0_s3/CLK
0.146 0.009 tHld 1 R7C7[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/wr_addr_0_s3

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path4

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/full_flag_r_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R8C7[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/full_flag_r_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C7[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/full_flag_r_s0/CLK
0.146 0.009 tHld 1 R8C7[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/full_flag_r_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path5

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_0_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R7C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_0_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R7C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_0_s0/CLK
0.146 0.009 tHld 1 R7C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_0_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path6

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_1_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R8C8[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_1_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C8[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_1_s0/CLK
0.146 0.009 tHld 1 R8C8[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_1_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path7

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_2_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R6C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_2_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R6C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_2_s0/CLK
0.146 0.009 tHld 1 R6C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_2_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path8

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_3_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R8C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_3_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_3_s0/CLK
0.146 0.009 tHld 1 R8C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_3_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path9

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_4_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R12C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_4_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R12C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_4_s0/CLK
0.146 0.009 tHld 1 R12C8[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_4_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path10

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_5_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R12C7[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_5_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R12C7[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_5_s0/CLK
0.146 0.009 tHld 1 R12C7[0][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_5_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path11

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_6_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R12C7[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_6_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R12C7[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_6_s0/CLK
0.146 0.009 tHld 1 R12C7[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_6_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path12

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_7_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R12C7[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_7_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R12C7[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_7_s0/CLK
0.146 0.009 tHld 1 R12C7[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_7_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path13

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_8_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R12C8[3][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_8_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R12C8[3][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_8_s0/CLK
0.146 0.009 tHld 1 R12C8[3][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_8_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path14

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_9_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R13C7[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_9_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R13C7[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_9_s0/CLK
0.146 0.009 tHld 1 R13C7[1][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_9_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path15

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_10_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R13C7[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_10_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R13C7[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_10_s0/CLK
0.146 0.009 tHld 1 R13C7[1][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_10_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path16

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_11_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R12C7[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_11_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R12C7[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_11_s0/CLK
0.146 0.009 tHld 1 R12C7[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_11_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path17

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_12_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R12C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_12_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R12C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_12_s0/CLK
0.146 0.009 tHld 1 R12C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_12_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path18

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_13_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R13C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_13_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R13C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_13_s0/CLK
0.146 0.009 tHld 1 R13C7[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_13_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path19

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_0_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R7C7[3][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_0_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R7C7[3][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_0_s0/CLK
0.146 0.009 tHld 1 R7C7[3][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_0_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path20

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_1_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R7C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_1_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R7C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_1_s0/CLK
0.146 0.009 tHld 1 R7C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_1_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path21

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_2_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R6C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_2_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R6C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_2_s0/CLK
0.146 0.009 tHld 1 R6C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_2_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path22

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_3_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R8C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_3_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_3_s0/CLK
0.146 0.009 tHld 1 R8C8[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_3_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path23

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_4_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R12C8[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_4_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R12C8[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_4_s0/CLK
0.146 0.009 tHld 1 R12C8[2][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_4_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path24

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_5_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R12C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_5_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R12C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_5_s0/CLK
0.146 0.009 tHld 1 R12C9[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_5_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Path25

Path Summary:

Slack 2.499
Data Arrival Time 2.645
Data Required Time 0.146
From inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0
To inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_6_s0
Launch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]
Latch Clk inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk:[R]

Data Arrival Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/CLK
0.383 0.247 tC2Q RR 1 R8C14[0][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/clear_fifo_s0/Q
1.211 0.828 tNET RR 1 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/I1
1.748 0.536 tINS RR 86 R11C9[3][B] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/n22_s1/F
2.645 0.897 tNET RR 1 R12C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_6_s0/CLEAR

Data Required Path:

AT DELAY TYPE RF FANOUT LOC NODE
0.000 0.000 active clock edge time
0.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
0.000 0.000 tCL RR 285 R20C0 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
0.136 0.136 tNET RR 1 R12C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_6_s0/CLK
0.146 0.009 tHld 1 R12C8[2][A] inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d0_6_s0

Path Statistics:

Clock Skew 0.000
Hold Relationship 0.000
Logic Level 2
Arrival Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%
Arrival Data Path Delay cell: 0.536, 21.390%; route: 1.725, 68.763%; tC2Q: 0.247, 9.848%
Required Clock Path Delay cell: 0.000, 0.000%; route: 0.136, 100.000%

Minimum Pulse Width Report:

Report Command:report_min_pulse_width -nworst 10 -detail

MPW1

MPW Summary:

Slack: 19.017
Actual Width: 19.943
Required Width: 0.926
Type: Low Pulse Width
Clock: inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
Objects: led_cnt_30_s0

Late clock Path:

AT DELAY TYPE RF NODE
20.000 0.000 active clock edge time
20.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
20.000 0.000 tCL FF inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
20.193 0.193 tNET FF led_cnt_30_s0/CLK

Early clock Path:

AT DELAY TYPE RF NODE
40.000 0.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.136 0.136 tNET RR led_cnt_30_s0/CLK

MPW2

MPW Summary:

Slack: 19.017
Actual Width: 19.943
Required Width: 0.926
Type: Low Pulse Width
Clock: inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
Objects: led_cnt_28_s0

Late clock Path:

AT DELAY TYPE RF NODE
20.000 0.000 active clock edge time
20.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
20.000 0.000 tCL FF inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
20.193 0.193 tNET FF led_cnt_28_s0/CLK

Early clock Path:

AT DELAY TYPE RF NODE
40.000 0.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.136 0.136 tNET RR led_cnt_28_s0/CLK

MPW3

MPW Summary:

Slack: 19.017
Actual Width: 19.943
Required Width: 0.926
Type: Low Pulse Width
Clock: inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
Objects: led_cnt_24_s0

Late clock Path:

AT DELAY TYPE RF NODE
20.000 0.000 active clock edge time
20.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
20.000 0.000 tCL FF inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
20.193 0.193 tNET FF led_cnt_24_s0/CLK

Early clock Path:

AT DELAY TYPE RF NODE
40.000 0.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.136 0.136 tNET RR led_cnt_24_s0/CLK

MPW4

MPW Summary:

Slack: 19.017
Actual Width: 19.943
Required Width: 0.926
Type: Low Pulse Width
Clock: inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
Objects: led_cnt_16_s0

Late clock Path:

AT DELAY TYPE RF NODE
20.000 0.000 active clock edge time
20.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
20.000 0.000 tCL FF inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
20.193 0.193 tNET FF led_cnt_16_s0/CLK

Early clock Path:

AT DELAY TYPE RF NODE
40.000 0.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.136 0.136 tNET RR led_cnt_16_s0/CLK

MPW5

MPW Summary:

Slack: 19.017
Actual Width: 19.943
Required Width: 0.926
Type: Low Pulse Width
Clock: inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
Objects: led_cnt_0_s0

Late clock Path:

AT DELAY TYPE RF NODE
20.000 0.000 active clock edge time
20.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
20.000 0.000 tCL FF inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
20.193 0.193 tNET FF led_cnt_0_s0/CLK

Early clock Path:

AT DELAY TYPE RF NODE
40.000 0.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.136 0.136 tNET RR led_cnt_0_s0/CLK

MPW6

MPW Summary:

Slack: 19.017
Actual Width: 19.943
Required Width: 0.926
Type: Low Pulse Width
Clock: inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
Objects: inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/tdi_vec_19_s0

Late clock Path:

AT DELAY TYPE RF NODE
20.000 0.000 active clock edge time
20.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
20.000 0.000 tCL FF inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
20.193 0.193 tNET FF inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/tdi_vec_19_s0/CLK

Early clock Path:

AT DELAY TYPE RF NODE
40.000 0.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.136 0.136 tNET RR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/tdi_vec_19_s0/CLK

MPW7

MPW Summary:

Slack: 19.017
Actual Width: 19.943
Required Width: 0.926
Type: Low Pulse Width
Clock: inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
Objects: inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/tdi_vec_d1_19_s0

Late clock Path:

AT DELAY TYPE RF NODE
20.000 0.000 active clock edge time
20.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
20.000 0.000 tCL FF inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
20.193 0.193 tNET FF inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/tdi_vec_d1_19_s0/CLK

Early clock Path:

AT DELAY TYPE RF NODE
40.000 0.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.136 0.136 tNET RR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/tdi_vec_d1_19_s0/CLK

MPW8

MPW Summary:

Slack: 19.017
Actual Width: 19.943
Required Width: 0.926
Type: Low Pulse Width
Clock: inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
Objects: inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_12_s0

Late clock Path:

AT DELAY TYPE RF NODE
20.000 0.000 active clock edge time
20.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
20.000 0.000 tCL FF inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
20.193 0.193 tNET FF inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_12_s0/CLK

Early clock Path:

AT DELAY TYPE RF NODE
40.000 0.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.136 0.136 tNET RR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_12_s0/CLK

MPW9

MPW Summary:

Slack: 19.017
Actual Width: 19.943
Required Width: 0.926
Type: Low Pulse Width
Clock: inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
Objects: inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_13_s0

Late clock Path:

AT DELAY TYPE RF NODE
20.000 0.000 active clock edge time
20.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
20.000 0.000 tCL FF inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
20.193 0.193 tNET FF inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_13_s0/CLK

Early clock Path:

AT DELAY TYPE RF NODE
40.000 0.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.136 0.136 tNET RR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/u_fifo2bx8192d/rd_addr_grey_d1_13_s0/CLK

MPW10

MPW Summary:

Slack: 19.017
Actual Width: 19.943
Required Width: 0.926
Type: Low Pulse Width
Clock: inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
Objects: inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/tdi_vec_d1_20_s0

Late clock Path:

AT DELAY TYPE RF NODE
20.000 0.000 active clock edge time
20.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
20.000 0.000 tCL FF inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
20.193 0.193 tNET FF inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/tdi_vec_d1_20_s0/CLK

Early clock Path:

AT DELAY TYPE RF NODE
40.000 0.000 active clock edge time
40.000 0.000 inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT.default_clk
40.000 0.000 tCL RR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/inst_osc_25M/osc_inst/OSCOUT
40.136 0.136 tNET RR inst_JTAG_HUB/inst_goConfig_JTAG/u_test1/tdi_vec_d1_20_s0/CLK

High Fanout Nets Report:

Report Command:report_high_fanout_nets -max_nets 10

FANOUT NET NAME WORST SLACK MAX DELAY
285 GW_OSC_CLK_d 31.238 0.489
86 n22_5 34.462 1.356
32 tck_mcu_pos 37.111 1.699
20 st_curr[0] 33.995 1.463
20 cnt_19_7 34.105 0.872
19 st_curr[1] 33.639 1.471
14 n24_6 37.632 0.963
13 n72_6 31.238 0.607
13 n24_5 33.370 0.980
12 n478_8 33.639 0.998

Route Congestions Report:

Report Command:report_route_congestion -max_grids 10

GRID LOC ROUTE CONGESTIONS
R11C13 86.11%
R12C8 86.11%
R12C13 84.72%
R13C12 84.72%
R5C8 83.33%
R11C9 83.33%
R9C14 83.33%
R13C13 83.33%
R12C12 81.94%
R6C10 80.56%

Timing Exceptions Report:

Setup Analysis Report

Report Command:report_exceptions -setup -max_paths 5 -max_common_paths 1

No timing exceptions to report!

Hold Analysis Report

Report Command:report_exceptions -hold -max_paths 5 -max_common_paths 1

No timing exceptions to report!

Recovery Analysis Report

Report Command:report_exceptions -recovery -max_paths 5 -max_common_paths 1

No timing exceptions to report!

Removal Analysis Report

Report Command:report_exceptions -removal -max_paths 5 -max_common_paths 1

No timing exceptions to report!

Timing Constraints Report:

SDC Command Type State Detail Command