| MODULE NAME |
REG NUMBER |
ALU NUMBER |
LUT NUMBER |
DSP NUMBER |
BSRAM NUMBER |
SSRAM NUMBER |
ROM16 NUMBER |
| top (F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/top.v) |
69 |
49 |
30 |
- |
- |
- |
- |
|--u_Gowin_PLL
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/top.v) |
- |
- |
- |
- |
- |
- |
- |
|--u1_reset_gen
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/top.v) |
13 |
11 |
6 |
- |
- |
- |
- |
|--u2_reset_gen
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/top.v) |
13 |
11 |
6 |
- |
- |
- |
- |
|--u_uart_bus_top
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/top.v) |
1438 |
39 |
960 |
- |
- |
- |
- |
|--u_apb2local
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/top.v) |
- |
- |
35 |
- |
- |
- |
- |
|--u_local2reg
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/top.v) |
547 |
- |
467 |
- |
- |
- |
- |
|--u_SerDes_Top
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/top.v) |
- |
- |
- |
- |
- |
- |
- |
|--RoraLink_64B66B_Top_inst
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/serdes/serdes.v) |
4776 |
272 |
6444 |
- |
2 |
- |
- |
|--u_data_ll_to_axi
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/top.v) |
- |
- |
10 |
- |
- |
- |
- |
|--u_axi_register_slice
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/ll_to_axi_reg.v) |
54 |
- |
32 |
- |
- |
- |
- |
|--u_ufc_ll_to_axi
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/top.v) |
- |
- |
- |
- |
- |
- |
- |
|--u_axi_register_slice
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/ll_to_axi_reg.v) |
36 |
- |
26 |
- |
- |
- |
- |
|--u_userk_ll_to_axi
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/top.v) |
- |
- |
- |
- |
- |
- |
- |
|--u_axi_register_slice
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/ll_to_axi_reg.v) |
44 |
- |
27 |
- |
- |
- |
- |
|--u_frame_gen
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/top.v) |
114 |
8 |
108 |
- |
- |
- |
- |
|--u_data_axi_to_ll
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/top.v) |
1 |
- |
27 |
- |
- |
- |
- |
|--u0_axi_register_slice
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/axi_to_ll_reg.v) |
148 |
- |
71 |
- |
- |
- |
- |
|--u1_axi_register_slice
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/axi_to_ll_reg.v) |
141 |
- |
71 |
- |
- |
- |
- |
|--u_ufc_axi_to_ll
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/top.v) |
1 |
- |
23 |
- |
- |
- |
- |
|--u0_axi_register_slice
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/axi_to_ll_reg.v) |
148 |
- |
71 |
- |
- |
- |
- |
|--u1_axi_register_slice
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/axi_to_ll_reg.v) |
141 |
- |
13 |
- |
- |
- |
- |
|--u_userk_axi_to_ll
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/top.v) |
- |
- |
- |
- |
- |
- |
- |
|--u0_axi_register_slice
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/axi_to_ll_reg.v) |
124 |
- |
66 |
- |
- |
- |
- |
|--u1_axi_register_slice
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/axi_to_ll_reg.v) |
123 |
- |
4 |
- |
- |
- |
- |
|--u_frame_check
(F:/138k_serdes/20251230/Gowin_RoraLink_64B66B_RefDesign/project/src/top.v) |
386 |
148 |
377 |
- |
- |
- |
- |