Hierarchy Module Resource
| MODULE NAME | REG NUMBER | ALU NUMBER | LUT NUMBER | DSP NUMBER | BSRAM NUMBER | SSRAM NUMBER | ROM16 NUMBER |
|---|---|---|---|---|---|---|---|
| top (E:/IP_Release/10G_Serial_Ethernet_MAC/1.1/ref_design/Gowin_10G_Ethernet_MAC_RefDesign/fpga_project/src/top.v) | 22 | - | 40 | - | - | - | - | |--u_SerDes_Top (E:/IP_Release/10G_Serial_Ethernet_MAC/1.1/ref_design/Gowin_10G_Ethernet_MAC_RefDesign/fpga_project/src/top.v) | - | - | - | - | - | - | - | |--Ten_Giga_Serial_Ethernet_Top_inst (E:/IP_Release/10G_Serial_Ethernet_MAC/1.1/ref_design/Gowin_10G_Ethernet_MAC_RefDesign/fpga_project/src/serdes/serdes.v) | 4461 | 34 | 3505 | - | 4 | - | - | |--u_Ten_Giga_Ethernet_MAC_Top (E:/IP_Release/10G_Serial_Ethernet_MAC/1.1/ref_design/Gowin_10G_Ethernet_MAC_RefDesign/fpga_project/src/top.v) | 3533 | 4 | 2892 | - | - | - | - | |--gw_gao_inst_0 (E:/IP_Release/10G_Serial_Ethernet_MAC/1.1/ref_design/Gowin_10G_Ethernet_MAC_RefDesign/fpga_project/impl/gwsynthesis/RTL_GAO/gw_gao_top.v) | 581 | 11 | 495 | - | 3 | - | - |