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	  10G Serial Ethernet设计实例说明
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目标器件:GW5AST-LV138FPG676AES
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1、10G_Serial_Ethernet_Readme即本文档，描述参考设计文件。
2、project目录为调用10G Serial Ethernet IP Core的工程，工程中的IP Core选择Quad1的Lane1，使用SMA作为156.25M时钟输入。使用说明请参考用户手册。
3、simulation目录为IP Core仿真的脚本。
4、tb目录为仿真文件。
5、仿真说明：
    modelsim仿真：
    （1）打开modelsim软件
    （2）进入目录simulation/modelsim
    （3）运行命令do cmd.do
   vcs仿真：
    （1）在simulation/vcs目录下运行vcs.sh，开始仿真并生成.fsdb文件
    （2）在simulation/vcs目录下运行verdi.sh，使用verdi软件查看波形
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	  10G Serial Ethernet Design Read Me
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Object device: GW5AST-LV138FPG676AES
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1、	"10G_Serial_Ethernet_Readme" is this document, which describes the reference design file.
2、	The project directory is a project that calls 10G Serial Ethernet IP Core. Select Lane1 of Quad1 for the IP Core in the project, and use SMA as the 156.25M clock input. Please refer to the user manual for instructions on use. 
3、	The simulation directory is the IP Core simulation script.
4、 The tb directory is the simulation file.
5、 Simulation description:
        modelsim simulation:
            (1) Open the modelsim software
            (2) Enter the directory simulation/modelsim
            (3) Run do cmd.do
        vcs simulation:
            (1) Run vcs.sh in the simulation/vcs directory, start simulation and generate .fsdb file.
            (2) Run verdi.sh in the simulation/vcs directory and use verdi software to view the waveforms.
