Power Messages

Report Title Power Analysis Report
Design File E:\myWork\IP\releaseVerify\RefDesign\1.9.9Beta-6\refDesign\Gowin_DVI_TX_RefDesign\project\impl\gwsynthesis\dk_video.vg
Physical Constraints File E:\myWork\IP\releaseVerify\RefDesign\1.9.9Beta-6\refDesign\Gowin_DVI_TX_RefDesign\project\src\dk_video.cst
Timing Constraints File E:\myWork\IP\releaseVerify\RefDesign\1.9.9Beta-6\refDesign\Gowin_DVI_TX_RefDesign\project\src\dk_video.sdc
Version V1.9.9 Beta-6
Part Number GW2A-LV18PG484C8/I7
Device GW2A-18
Device Version C
Created Time Fri Oct 27 11:06:16 2023
Legal Announcement Copyright (C)2014-2023 Gowin Semiconductor Corporation. All rights reserved.

Power Summary

Power Information:

Total Power (mW) 155.907
Quiescent Power (mW) 91.706
Dynamic Power (mW) 64.201

Thermal Information:

Junction Temperature 28.717
Theta JA 23.840
Max Allowed Ambient Temperature 81.283

Configure Information:

Default IO Toggle Rate 0.125
Default Remain Toggle Rate 0.125
Use Vectorless Estimation false
Filter Glitches false
Related Vcd File
Related Saif File
Use Custom Theta JA false
Air Flow LFM_0
Heat Sink None
Use Custom Theta SA false
Board Thermal Model None
Use Custom Theta JB false
Ambient Temperature 25.000

Supply Information:

Voltage Source Voltage Dynamic Current(mA) Quiescent Current(mA) Power(mW)
VCC 1.000 41.277 61.511 102.788
VCCX 2.500 1.272 11.364 31.590
VCCIO12 1.200 0.187 0.200 0.464
VCCIO15 1.500 0.057 0.377 0.651
VCCIO25 2.500 7.773 0.392 20.413

Power Details

Power By Block Type:

Block Type Total Power(mW) Static Power(mW) Average Toggle Rate(millions of transitions/sec)
Logic 0.919 NA 9.007
IO 27.545 3.160 25.750
PLL 38.852 NA NA

Power By Hierarchy:

Hierarchy Entity Total Power(mW) Block Dynamic Power(mW)
video_top 39.772 39.772(39.680)
video_top/DVI_TX_Top_inst/ 0.547 0.547(0.547)
video_top/DVI_TX_Top_inst/rgb2dvi_inst/ 0.547 0.547(0.547)
video_top/DVI_TX_Top_inst/rgb2dvi_inst/TMDS8b10b_inst_b/ 0.182 0.182(0.000)
video_top/DVI_TX_Top_inst/rgb2dvi_inst/TMDS8b10b_inst_g/ 0.182 0.182(0.000)
video_top/DVI_TX_Top_inst/rgb2dvi_inst/TMDS8b10b_inst_r/ 0.183 0.183(0.000)
video_top/testpattern_inst/ 0.281 0.281(0.000)
video_top/u_tmds_rpll/ 38.852 38.852(0.000)

Power By Clock Domain:

Clock Domain Clock Frequency(Mhz) Total Dynamic Power(mW)
u_clkdiv/CLKOUT.default_gen_clk 74.286 0.898
I_clk 50.000 38.892
NO CLOCK DOMAIN 0.000 0.000
u_tmds_rpll/rpll_inst/CLKOUT.default_gen_clk 371.429 0.025