Hierarchy Module Resource
| MODULE NAME | REG NUMBER | ALU NUMBER | LUT NUMBER | DSP NUMBER | BSRAM NUMBER | SSRAM NUMBER |
|---|---|---|---|---|---|---|
| CSI_Demo_Top (E:/myWork/IP/releaseVerify/version/1.9.9.02/Gowin_DSI_RX_B2P_RefDesigns/csi_rx_demo_5a25/fpga_proj/src/top.v) | 85 | - | 103 | - | - | - | |--u_ov5647_ctrl (E:/myWork/IP/releaseVerify/version/1.9.9.02/Gowin_DSI_RX_B2P_RefDesigns/csi_rx_demo_5a25/fpga_proj/src/top.v) | 35 | 31 | 35 | - | - | - | |--Regs (E:/myWork/IP/releaseVerify/version/1.9.9.02/Gowin_DSI_RX_B2P_RefDesigns/csi_rx_demo_5a25/fpga_proj/src/ov5647/ov5647_init/OV5647_Controller.v) | 63 | 39 | 166 | - | - | - | |--I2C (E:/myWork/IP/releaseVerify/version/1.9.9.02/Gowin_DSI_RX_B2P_RefDesigns/csi_rx_demo_5a25/fpga_proj/src/ov5647/ov5647_init/OV5647_Controller.v) | 94 | - | 144 | - | - | - | |--u_pll (E:/myWork/IP/releaseVerify/version/1.9.9.02/Gowin_DSI_RX_B2P_RefDesigns/csi_rx_demo_5a25/fpga_proj/src/top.v) | - | - | - | - | - | - | |--u_hard_dphy (E:/myWork/IP/releaseVerify/version/1.9.9.02/Gowin_DSI_RX_B2P_RefDesigns/csi_rx_demo_5a25/fpga_proj/src/top.v) | - | - | 1 | - | - | - | |--u_csi_rx (E:/myWork/IP/releaseVerify/version/1.9.9.02/Gowin_DSI_RX_B2P_RefDesigns/csi_rx_demo_5a25/fpga_proj/src/top.v) | 174 | 9 | 189 | - | - | - | |--u_b2p (E:/myWork/IP/releaseVerify/version/1.9.9.02/Gowin_DSI_RX_B2P_RefDesigns/csi_rx_demo_5a25/fpga_proj/src/top.v) | 207 | 20 | 143 | - | 1 | - | |--u_bayer_rgb (E:/myWork/IP/releaseVerify/version/1.9.9.02/Gowin_DSI_RX_B2P_RefDesigns/csi_rx_demo_5a25/fpga_proj/src/top.v) | 112 | - | 92 | - | - | - | |--video_format_detect_inst (E:/myWork/IP/releaseVerify/version/1.9.9.02/Gowin_DSI_RX_B2P_RefDesigns/csi_rx_demo_5a25/fpga_proj/src/ov5647/bayer_to_rgb/bayer_rgb.v) | 35 | - | 19 | - | - | - | |--shift_line_inst0 (E:/myWork/IP/releaseVerify/version/1.9.9.02/Gowin_DSI_RX_B2P_RefDesigns/csi_rx_demo_5a25/fpga_proj/src/ov5647/bayer_to_rgb/bayer_rgb.v) | 22 | 21 | 12 | - | - | - | |--ram_line_inst (E:/myWork/IP/releaseVerify/version/1.9.9.02/Gowin_DSI_RX_B2P_RefDesigns/csi_rx_demo_5a25/fpga_proj/src/ov5647/bayer_to_rgb/shift_line.v) | - | - | - | - | 1 | - |