@N|Running in 64-bit mode
@N|Running in 64-bit mode
@N: CG1349 :	| Running Verilog Compiler in System Verilog mode
@N: CG1350 :	| Running Verilog Compiler in Multiple File Compilation Unit mode
@N: CG364 :"/netapp/share/gwsw/gowin_new/Gowin/Gowin_YunYuan_V1.9.xBeta/IDE/ipcore/Gamma_Correction/data/gamma_top_wrap.v":16:19:16:19|Synthesizing module Gamma_Correction_Top in library work.
@N|Running in 64-bit mode
@N: NF107 :"/netapp/share/gwsw/gowin_new/Gowin/Gowin_YunYuan_V1.9.xBeta/IDE/ipcore/Gamma_Correction/data/gamma_top_wrap.v":16:19:16:19|Selected library: work cell: Gamma_Correction_Top view verilog as top level
@N: NF107 :"/netapp/share/gwsw/gowin_new/Gowin/Gowin_YunYuan_V1.9.xBeta/IDE/ipcore/Gamma_Correction/data/gamma_top_wrap.v":16:19:16:19|Selected library: work cell: Gamma_Correction_Top view verilog as top level

