#### START OF AREA REPORT #####[
Part: GW2A_55PBGA484-8 (GoWin)
Click here to go to specific block report:
TOP
GW_OSC
GW_PLL
RAM_based_shift_reg_top
ÜþRAM_based_shift_reg®RAM_based_shift_reg_top_
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######## Utilization report for Top level view: TOP ########
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SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
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REGISTERS 56 100 %
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Total SEQUENTIAL ELEMENTS in the block TOP: 56 (26.92 % Utilization)
Top
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
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LUTS 75 100 %
MUX2_LUT5 6 100 %
MUX2_LUT6 3 100 %
ALU 44 100 %
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Total COMBINATIONAL LOGIC in the block TOP: 128 (61.54 % Utilization)
Top
MEMORY ELEMENTS
Name Total elements Utilization Notes
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BLOCK RAMS/ROMS 1 100 %
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Total MEMORY ELEMENTS in the block TOP: 1 (0.48 % Utilization)
Top
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######## Utilization report for cell: GW_OSC ########
Instance path: TOP.GW_OSC
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######## Utilization report for cell: GW_PLL ########
Instance path: TOP.GW_PLL
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######## Utilization report for cell: RAM_based_shift_reg_top ########
Instance path: TOP.RAM_based_shift_reg_top
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SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
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REGISTERS 29 51.8 %
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Total SEQUENTIAL ELEMENTS in the block TOP.RAM_based_shift_reg_top: 29 (13.94 % Utilization)
Top
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
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LUTS 64 85.3 %
MUX2_LUT5 6 100 %
MUX2_LUT6 3 100 %
ALU 17 38.6 %
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Total COMBINATIONAL LOGIC in the block TOP.RAM_based_shift_reg_top: 90 (43.27 % Utilization)
Top
MEMORY ELEMENTS
Name Total elements Utilization Notes
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BLOCK RAMS/ROMS 1 100 %
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Total MEMORY ELEMENTS in the block TOP.RAM_based_shift_reg_top: 1 (0.48 % Utilization)
Top
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######## Utilization report for cell: \\\~RAM_based_shift_reg\.RAM_based_shift_reg_top_\ ########
Instance path: RAM_based_shift_reg_top.\\\~RAM_based_shift_reg\.RAM_based_shift_reg_top_\
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SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
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REGISTERS 29 51.8 %
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Total SEQUENTIAL ELEMENTS in the block RAM_based_shift_reg_top.\\\~RAM_based_shift_reg\.RAM_based_shift_reg_top_\ : 29 (13.94 % Utilization)
Top
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
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LUTS 64 85.3 %
MUX2_LUT5 6 100 %
MUX2_LUT6 3 100 %
ALU 17 38.6 %
======================================================
Total COMBINATIONAL LOGIC in the block RAM_based_shift_reg_top.\\\~RAM_based_shift_reg\.RAM_based_shift_reg_top_\ : 90 (43.27 % Utilization)
Top
MEMORY ELEMENTS
Name Total elements Utilization Notes
------------------------------------------------------------
BLOCK RAMS/ROMS 1 100 %
============================================================
Total MEMORY ELEMENTS in the block RAM_based_shift_reg_top.\\\~RAM_based_shift_reg\.RAM_based_shift_reg_top_\ : 1 (0.48 % Utilization)
Top
##### END OF AREA REPORT #####]