Power Messages

Report Title Power Analysis Report
Design File E:\myWork\IP\releaseVerify\RefDesign\DSP_Math\Gowin_Float_to_Fixed_RefDesign\Proj\impl\gwsynthesis\Float_Fix.vg
Physical Constraints File E:\myWork\IP\releaseVerify\RefDesign\DSP_Math\Gowin_Float_to_Fixed_RefDesign\Proj\src\Float_to_Fixed.cst
Timing Constraints File E:\myWork\IP\releaseVerify\RefDesign\DSP_Math\Gowin_Float_to_Fixed_RefDesign\Proj\src\Float_to_Fixed.sdc
Tool Version V1.9.11 (64-bit)
Part Number GW2A-LV55PG484C8/I7
Device GW2A-55
Created Time Tue Dec 24 09:09:08 2024
Legal Announcement Copyright (C)2014-2024 Gowin Semiconductor Corporation. All rights reserved.

Configure Information:

Grade Commercial
Process Typical
Ambient Temperature 25.000
Use Custom Theta JA false
Heat Sink None
Air Flow LFM_0
Use Custom Theta SA false
Board Thermal Model None
Use Custom Theta JB false
Related Vcd File
Related Saif File
Filter Glitches false
Default IO Toggle Rate 0.125
Default Remain Toggle Rate 0.125

Power Summary

Power Information:

Total Power (mW) 307.624
Quiescent Power (mW) 267.021
Dynamic Power (mW) 40.603

Thermal Information:

Junction Temperature 30.756
Theta JA 18.710
Max Allowed Ambient Temperature 79.244

Supply Information:

Voltage Source Voltage Dynamic Current(mA) Quiescent Current(mA) Power(mW)
VCC 1.000 29.509 149.810 179.319
VCCX 3.300 2.177 35.000 122.684
VCCIO18 1.800 2.172 0.950 5.621

Power Details

Power By Block Type:

Block Type Total Power(mW) Static Power(mW) Average Toggle Rate(millions of transitions/sec)
Logic 0.453 NA 4.395
IO 28.215 14.943 7.161
BSRAM 26.870 NA NA

Power By Hierarchy:

Hierarchy Entity Total Power(mW) Block Dynamic Power(mW)
top 27.322 27.322(26.573)
top/Float_to_Fixed_Top_inst/ 0.203 0.203(0.203)
top/Float_to_Fixed_Top_inst/Float_to_Fixed_inst/ 0.203 0.203(0.000)
top/gw_gao_inst_0/ 26.370 26.370(26.370)
top/gw_gao_inst_0/u_icon_top/ 0.005 0.005(0.000)
top/gw_gao_inst_0/u_la0_top/ 26.365 26.365(26.241)
top/gw_gao_inst_0/u_la0_top/u_ao_crc32/ 0.010 0.010(0.000)
top/gw_gao_inst_0/u_la0_top/u_ao_match_0/ 0.002 0.002(0.000)
top/gw_gao_inst_0/u_la0_top/u_ao_mem_ctrl/ 26.229 26.229(0.000)

Power By Clock Domain:

Clock Domain Clock Frequency(Mhz) Total Dynamic Power(mW)
tck_pad_i 20.000 7.590
clk 50.000 19.742