Synthesis Messages

Report Title GowinSynthesis Report
Design File C:\Gowin\Gowin_V1.9.8.07\IDE\ipcore\CIC_Filter\data\CIC_Filter.v
C:\Gowin\Gowin_V1.9.8.07\IDE\ipcore\CIC_Filter\data\CIC_Filter_wrap.v
GowinSynthesis Constraints File ---
Version GowinSynthesis V1.9.8.07
Part Number GW2A-LV18PG256C8/I7
Device GW2A-18
Created Time Fri Jul 15 10:28:58 2022
Legal Announcement Copyright (C)2014-2022 Gowin Semiconductor Corporation. ALL rights reserved.

Synthesis Details

Top Level Module CIC_Fliter_Top
Synthesis Process Running parser:
    CPU time = 0h 0m 0.218s, Elapsed time = 0h 0m 0.227s, Peak memory usage = 44.504MB
Running netlist conversion:
    CPU time = 0h 0m 0.015s, Elapsed time = 0h 0m 0.01s, Peak memory usage = 44.504MB
Running device independent optimization:
    Optimizing Phase 0: CPU time = 0h 0m 0.015s, Elapsed time = 0h 0m 0.018s, Peak memory usage = 44.504MB
    Optimizing Phase 1: CPU time = 0h 0m 0.015s, Elapsed time = 0h 0m 0.01s, Peak memory usage = 44.504MB
    Optimizing Phase 2: CPU time = 0h 0m 0.015s, Elapsed time = 0h 0m 0.014s, Peak memory usage = 44.504MB
Running inference:
    Inferring Phase 0: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.002s, Peak memory usage = 44.504MB
    Inferring Phase 1: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.001s, Peak memory usage = 44.504MB
    Inferring Phase 2: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.002s, Peak memory usage = 44.504MB
    Inferring Phase 3: CPU time = 0h 0m 0.015s, Elapsed time = 0h 0m 0.002s, Peak memory usage = 44.504MB
Running technical mapping:
    Tech-Mapping Phase 0: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.015s, Peak memory usage = 44.504MB
    Tech-Mapping Phase 1: CPU time = 0h 0m 0.015s, Elapsed time = 0h 0m 0.004s, Peak memory usage = 44.504MB
    Tech-Mapping Phase 2: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.003s, Peak memory usage = 44.504MB
    Tech-Mapping Phase 3: CPU time = 0h 0m 0.125s, Elapsed time = 0h 0m 0.135s, Peak memory usage = 54.887MB
    Tech-Mapping Phase 4: CPU time = 0h 0m 0.031s, Elapsed time = 0h 0m 0.03s, Peak memory usage = 54.887MB
Generate output files:
    CPU time = 0h 0m 0.078s, Elapsed time = 0h 0m 0.074s, Peak memory usage = 54.887MB
Total Time and Memory Usage CPU time = 0h 0m 0.542s, Elapsed time = 0h 0m 0.547s, Peak memory usage = 54.887MB

Resource

Resource Usage Summary

Resource Usage
I/O Port 36
I/O Buf 36
    IBUF 12
    OBUF 24
Register 302
    DFFE 2
    DFFPE 2
    DFFC 23
    DFFCE 275
LUT 34
    LUT2 26
    LUT3 5
    LUT4 3
ALU 138
    ALU 138
SSRAM 3
    RAM16S4 3
INV 2
    INV 2

Resource Utilization Summary

Resource Usage Utilization
Logic 192(36 LUTs, 138 ALUs, 3 SSRAMs) / 20736 1%
Register 302 / 16173 2%
  --Register as Latch 0 / 16173 0%
  --Register as FF 302 / 16173 2%
BSRAM 0 / 46 0%

Timing

Clock Summary:

Clock Name Type Period Frequency(MHz) Rise Fall Source Master Object
clk Base 10.000 100.0 0.000 5.000 clk_ibuf/I

Max Frequency Summary:

No. Clock Name Constraint Actual Fmax Logic Level Entity
1 clk 100.0(MHz) 277.1(MHz) 6 TOP

Detail Timing Paths Information

Path 1

Path Summary:
Slack 6.391
Data Arrival Time 4.436
Data Required Time 10.828
From CIC_Filter/comb[0].comb_inst/buff_delay[0]_0_s15
To CIC_Filter/comb[0].comb_inst/comb_out_22_s0
Launch Clk clk[R]
Latch Clk clk[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 clk
0.000 0.000 tCL RR 1 clk_ibuf/I
0.683 0.683 tINS RR 305 clk_ibuf/O
0.863 0.180 tNET RR 1 CIC_Filter/comb[0].comb_inst/buff_delay[0]_0_s15/CLK
1.095 0.232 tC2Q RF 1 CIC_Filter/comb[0].comb_inst/buff_delay[0]_0_s15/Q
1.332 0.237 tNET FF 1 CIC_Filter/comb[0].comb_inst/buff_delay[3]_8_s4/I1
1.887 0.555 tINS FF 9 CIC_Filter/comb[0].comb_inst/buff_delay[3]_8_s4/F
2.124 0.237 tNET FF 1 CIC_Filter/comb[0].comb_inst/buff_delay[3]_0_s3/I0
2.641 0.517 tINS FF 1 CIC_Filter/comb[0].comb_inst/buff_delay[3]_0_s3/F
2.878 0.237 tNET FF 2 CIC_Filter/comb[0].comb_inst/n53_s/I1
3.447 0.570 tINS FR 1 CIC_Filter/comb[0].comb_inst/n53_s/COUT
3.447 0.000 tNET RR 2 CIC_Filter/comb[0].comb_inst/n52_s/CIN
3.483 0.035 tINS RF 1 CIC_Filter/comb[0].comb_inst/n52_s/COUT
3.483 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n51_s/CIN
3.518 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n51_s/COUT
3.518 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n50_s/CIN
3.553 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n50_s/COUT
3.553 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n49_s/CIN
3.588 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n49_s/COUT
3.588 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n48_s/CIN
3.624 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n48_s/COUT
3.624 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n47_s/CIN
3.659 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n47_s/COUT
3.659 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n46_s/CIN
3.694 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n46_s/COUT
3.694 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n45_s/CIN
3.729 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n45_s/COUT
3.729 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n31_s/CIN
4.199 0.470 tINS FF 1 CIC_Filter/comb[0].comb_inst/n31_s/SUM
4.436 0.237 tNET FF 1 CIC_Filter/comb[0].comb_inst/comb_out_22_s0/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
10.000 0.000 clk
10.000 0.000 tCL RR 1 clk_ibuf/I
10.682 0.683 tINS RR 305 clk_ibuf/O
10.863 0.180 tNET RR 1 CIC_Filter/comb[0].comb_inst/comb_out_22_s0/CLK
10.828 -0.035 tSu 1 CIC_Filter/comb[0].comb_inst/comb_out_22_s0
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 10.000
Logic Level: 6
Arrival Clock Path Delay: cell: 0.683, 79.130%; route: 0.180, 20.870%
Arrival Data Path Delay: cell: 2.394, 66.980%; route: 0.948, 26.528%; tC2Q: 0.232, 6.492%
Required Clock Path Delay: cell: 0.683, 79.130%; route: 0.180, 20.870%

Path 2

Path Summary:
Slack 6.427
Data Arrival Time 4.401
Data Required Time 10.828
From CIC_Filter/comb[0].comb_inst/buff_delay[0]_0_s15
To CIC_Filter/comb[0].comb_inst/comb_out_8_s0
Launch Clk clk[R]
Latch Clk clk[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 clk
0.000 0.000 tCL RR 1 clk_ibuf/I
0.683 0.683 tINS RR 305 clk_ibuf/O
0.863 0.180 tNET RR 1 CIC_Filter/comb[0].comb_inst/buff_delay[0]_0_s15/CLK
1.095 0.232 tC2Q RF 1 CIC_Filter/comb[0].comb_inst/buff_delay[0]_0_s15/Q
1.332 0.237 tNET FF 1 CIC_Filter/comb[0].comb_inst/buff_delay[3]_8_s4/I1
1.887 0.555 tINS FF 9 CIC_Filter/comb[0].comb_inst/buff_delay[3]_8_s4/F
2.124 0.237 tNET FF 1 CIC_Filter/comb[0].comb_inst/buff_delay[3]_0_s3/I0
2.641 0.517 tINS FF 1 CIC_Filter/comb[0].comb_inst/buff_delay[3]_0_s3/F
2.878 0.237 tNET FF 2 CIC_Filter/comb[0].comb_inst/n53_s/I1
3.447 0.570 tINS FR 1 CIC_Filter/comb[0].comb_inst/n53_s/COUT
3.447 0.000 tNET RR 2 CIC_Filter/comb[0].comb_inst/n52_s/CIN
3.483 0.035 tINS RF 1 CIC_Filter/comb[0].comb_inst/n52_s/COUT
3.483 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n51_s/CIN
3.518 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n51_s/COUT
3.518 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n50_s/CIN
3.553 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n50_s/COUT
3.553 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n49_s/CIN
3.588 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n49_s/COUT
3.588 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n48_s/CIN
3.624 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n48_s/COUT
3.624 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n47_s/CIN
3.659 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n47_s/COUT
3.659 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n46_s/CIN
3.694 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n46_s/COUT
3.694 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n45_s/CIN
4.164 0.470 tINS FF 1 CIC_Filter/comb[0].comb_inst/n45_s/SUM
4.401 0.237 tNET FF 1 CIC_Filter/comb[0].comb_inst/comb_out_8_s0/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
10.000 0.000 clk
10.000 0.000 tCL RR 1 clk_ibuf/I
10.682 0.683 tINS RR 305 clk_ibuf/O
10.863 0.180 tNET RR 1 CIC_Filter/comb[0].comb_inst/comb_out_8_s0/CLK
10.828 -0.035 tSu 1 CIC_Filter/comb[0].comb_inst/comb_out_8_s0
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 10.000
Logic Level: 6
Arrival Clock Path Delay: cell: 0.683, 79.130%; route: 0.180, 20.870%
Arrival Data Path Delay: cell: 2.358, 66.651%; route: 0.948, 26.792%; tC2Q: 0.232, 6.557%
Required Clock Path Delay: cell: 0.683, 79.130%; route: 0.180, 20.870%

Path 3

Path Summary:
Slack 6.462
Data Arrival Time 4.366
Data Required Time 10.828
From CIC_Filter/comb[0].comb_inst/buff_delay[0]_0_s15
To CIC_Filter/comb[0].comb_inst/comb_out_7_s0
Launch Clk clk[R]
Latch Clk clk[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 clk
0.000 0.000 tCL RR 1 clk_ibuf/I
0.683 0.683 tINS RR 305 clk_ibuf/O
0.863 0.180 tNET RR 1 CIC_Filter/comb[0].comb_inst/buff_delay[0]_0_s15/CLK
1.095 0.232 tC2Q RF 1 CIC_Filter/comb[0].comb_inst/buff_delay[0]_0_s15/Q
1.332 0.237 tNET FF 1 CIC_Filter/comb[0].comb_inst/buff_delay[3]_8_s4/I1
1.887 0.555 tINS FF 9 CIC_Filter/comb[0].comb_inst/buff_delay[3]_8_s4/F
2.124 0.237 tNET FF 1 CIC_Filter/comb[0].comb_inst/buff_delay[3]_0_s3/I0
2.641 0.517 tINS FF 1 CIC_Filter/comb[0].comb_inst/buff_delay[3]_0_s3/F
2.878 0.237 tNET FF 2 CIC_Filter/comb[0].comb_inst/n53_s/I1
3.447 0.570 tINS FR 1 CIC_Filter/comb[0].comb_inst/n53_s/COUT
3.447 0.000 tNET RR 2 CIC_Filter/comb[0].comb_inst/n52_s/CIN
3.483 0.035 tINS RF 1 CIC_Filter/comb[0].comb_inst/n52_s/COUT
3.483 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n51_s/CIN
3.518 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n51_s/COUT
3.518 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n50_s/CIN
3.553 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n50_s/COUT
3.553 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n49_s/CIN
3.588 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n49_s/COUT
3.588 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n48_s/CIN
3.624 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n48_s/COUT
3.624 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n47_s/CIN
3.659 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n47_s/COUT
3.659 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n46_s/CIN
4.129 0.470 tINS FF 1 CIC_Filter/comb[0].comb_inst/n46_s/SUM
4.366 0.237 tNET FF 1 CIC_Filter/comb[0].comb_inst/comb_out_7_s0/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
10.000 0.000 clk
10.000 0.000 tCL RR 1 clk_ibuf/I
10.682 0.683 tINS RR 305 clk_ibuf/O
10.863 0.180 tNET RR 1 CIC_Filter/comb[0].comb_inst/comb_out_7_s0/CLK
10.828 -0.035 tSu 1 CIC_Filter/comb[0].comb_inst/comb_out_7_s0
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 10.000
Logic Level: 6
Arrival Clock Path Delay: cell: 0.683, 79.130%; route: 0.180, 20.870%
Arrival Data Path Delay: cell: 2.323, 66.316%; route: 0.948, 27.061%; tC2Q: 0.232, 6.623%
Required Clock Path Delay: cell: 0.683, 79.130%; route: 0.180, 20.870%

Path 4

Path Summary:
Slack 6.497
Data Arrival Time 4.331
Data Required Time 10.828
From CIC_Filter/comb[0].comb_inst/buff_delay[0]_0_s15
To CIC_Filter/comb[0].comb_inst/comb_out_6_s0
Launch Clk clk[R]
Latch Clk clk[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 clk
0.000 0.000 tCL RR 1 clk_ibuf/I
0.683 0.683 tINS RR 305 clk_ibuf/O
0.863 0.180 tNET RR 1 CIC_Filter/comb[0].comb_inst/buff_delay[0]_0_s15/CLK
1.095 0.232 tC2Q RF 1 CIC_Filter/comb[0].comb_inst/buff_delay[0]_0_s15/Q
1.332 0.237 tNET FF 1 CIC_Filter/comb[0].comb_inst/buff_delay[3]_8_s4/I1
1.887 0.555 tINS FF 9 CIC_Filter/comb[0].comb_inst/buff_delay[3]_8_s4/F
2.124 0.237 tNET FF 1 CIC_Filter/comb[0].comb_inst/buff_delay[3]_0_s3/I0
2.641 0.517 tINS FF 1 CIC_Filter/comb[0].comb_inst/buff_delay[3]_0_s3/F
2.878 0.237 tNET FF 2 CIC_Filter/comb[0].comb_inst/n53_s/I1
3.447 0.570 tINS FR 1 CIC_Filter/comb[0].comb_inst/n53_s/COUT
3.447 0.000 tNET RR 2 CIC_Filter/comb[0].comb_inst/n52_s/CIN
3.483 0.035 tINS RF 1 CIC_Filter/comb[0].comb_inst/n52_s/COUT
3.483 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n51_s/CIN
3.518 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n51_s/COUT
3.518 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n50_s/CIN
3.553 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n50_s/COUT
3.553 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n49_s/CIN
3.588 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n49_s/COUT
3.588 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n48_s/CIN
3.624 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n48_s/COUT
3.624 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n47_s/CIN
4.094 0.470 tINS FF 1 CIC_Filter/comb[0].comb_inst/n47_s/SUM
4.331 0.237 tNET FF 1 CIC_Filter/comb[0].comb_inst/comb_out_6_s0/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
10.000 0.000 clk
10.000 0.000 tCL RR 1 clk_ibuf/I
10.682 0.683 tINS RR 305 clk_ibuf/O
10.863 0.180 tNET RR 1 CIC_Filter/comb[0].comb_inst/comb_out_6_s0/CLK
10.828 -0.035 tSu 1 CIC_Filter/comb[0].comb_inst/comb_out_6_s0
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 10.000
Logic Level: 5
Arrival Clock Path Delay: cell: 0.683, 79.130%; route: 0.180, 20.870%
Arrival Data Path Delay: cell: 2.288, 65.974%; route: 0.948, 27.336%; tC2Q: 0.232, 6.690%
Required Clock Path Delay: cell: 0.683, 79.130%; route: 0.180, 20.870%

Path 5

Path Summary:
Slack 6.532
Data Arrival Time 4.295
Data Required Time 10.828
From CIC_Filter/comb[0].comb_inst/buff_delay[0]_0_s15
To CIC_Filter/comb[0].comb_inst/comb_out_5_s0
Launch Clk clk[R]
Latch Clk clk[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 clk
0.000 0.000 tCL RR 1 clk_ibuf/I
0.683 0.683 tINS RR 305 clk_ibuf/O
0.863 0.180 tNET RR 1 CIC_Filter/comb[0].comb_inst/buff_delay[0]_0_s15/CLK
1.095 0.232 tC2Q RF 1 CIC_Filter/comb[0].comb_inst/buff_delay[0]_0_s15/Q
1.332 0.237 tNET FF 1 CIC_Filter/comb[0].comb_inst/buff_delay[3]_8_s4/I1
1.887 0.555 tINS FF 9 CIC_Filter/comb[0].comb_inst/buff_delay[3]_8_s4/F
2.124 0.237 tNET FF 1 CIC_Filter/comb[0].comb_inst/buff_delay[3]_0_s3/I0
2.641 0.517 tINS FF 1 CIC_Filter/comb[0].comb_inst/buff_delay[3]_0_s3/F
2.878 0.237 tNET FF 2 CIC_Filter/comb[0].comb_inst/n53_s/I1
3.447 0.570 tINS FR 1 CIC_Filter/comb[0].comb_inst/n53_s/COUT
3.447 0.000 tNET RR 2 CIC_Filter/comb[0].comb_inst/n52_s/CIN
3.483 0.035 tINS RF 1 CIC_Filter/comb[0].comb_inst/n52_s/COUT
3.483 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n51_s/CIN
3.518 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n51_s/COUT
3.518 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n50_s/CIN
3.553 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n50_s/COUT
3.553 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n49_s/CIN
3.588 0.035 tINS FF 1 CIC_Filter/comb[0].comb_inst/n49_s/COUT
3.588 0.000 tNET FF 2 CIC_Filter/comb[0].comb_inst/n48_s/CIN
4.058 0.470 tINS FF 1 CIC_Filter/comb[0].comb_inst/n48_s/SUM
4.295 0.237 tNET FF 1 CIC_Filter/comb[0].comb_inst/comb_out_5_s0/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
10.000 0.000 clk
10.000 0.000 tCL RR 1 clk_ibuf/I
10.682 0.683 tINS RR 305 clk_ibuf/O
10.863 0.180 tNET RR 1 CIC_Filter/comb[0].comb_inst/comb_out_5_s0/CLK
10.828 -0.035 tSu 1 CIC_Filter/comb[0].comb_inst/comb_out_5_s0
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 10.000
Logic Level: 5
Arrival Clock Path Delay: cell: 0.683, 79.130%; route: 0.180, 20.870%
Arrival Data Path Delay: cell: 2.253, 65.626%; route: 0.948, 27.616%; tC2Q: 0.232, 6.758%
Required Clock Path Delay: cell: 0.683, 79.130%; route: 0.180, 20.870%