Power Messages

Report Title Power Analysis Report
Design File E:\myWork\IP\releaseVerify\version\1.9.11.02\Gowin_XCORR_RefDesign\XCORR_17_1024_16_case\project\impl\gwsynthesis\XCORR.vg
Physical Constraints File E:\myWork\IP\releaseVerify\version\1.9.11.02\Gowin_XCORR_RefDesign\XCORR_17_1024_16_case\project\src\XCORR.cst
Timing Constraints File E:\myWork\IP\releaseVerify\version\1.9.11.02\Gowin_XCORR_RefDesign\XCORR_17_1024_16_case\project\src\XCORR.sdc
Tool Version V1.9.11.02 (64-bit)
Part Number GW5A-LV25UG324ES
Device GW5A-25
Device Version A
Created Time Tue Jun 10 15:32:44 2025
Legal Announcement Copyright (C)2014-2025 Gowin Semiconductor Corporation. All rights reserved.

Configure Information:

Grade Commercial
Process Typical
Ambient Temperature 25.000
Use Custom Theta JA false
Heat Sink None
Air Flow LFM_0
Use Custom Theta SA false
Board Thermal Model None
Use Custom Theta JB false
Related Vcd File
Related Saif File
Filter Glitches false
Default IO Toggle Rate 0.125
Default Remain Toggle Rate 0.125

Power Summary

Power Information:

Total Power (mW) 192.565
Quiescent Power (mW) 53.562
Dynamic Power (mW) 139.003

Thermal Information:

Junction Temperature 30.276
Theta JA 27.400
Max Allowed Ambient Temperature 79.724

Supply Information:

Voltage Source Voltage Dynamic Current(mA) Quiescent Current(mA) Power(mW)
VCC 0.900 126.546 30.045 140.932
VCCX 3.300 3.805 3.000 22.456
VCCIO33 3.300 3.805 1.037 15.977
VCCLDO 3.300 0.000 4.000 13.200

Power Details

Power By Block Type:

Block Type Total Power(mW) Static Power(mW) Average Toggle Rate(millions of transitions/sec)
Logic 0.348 NA 7.405
IO 49.842 21.311 13.407
BSRAM 110.124 NA NA

Power By Hierarchy:

Hierarchy Entity Total Power(mW) Block Dynamic Power(mW)
top 110.472 110.472(109.423)
top/gw_gao_inst_0/ 98.320 98.320(98.320)
top/gw_gao_inst_0/u_icon_top/ 0.002 0.002(0.000)
top/gw_gao_inst_0/u_la0_top/ 98.318 98.318(98.250)
top/gw_gao_inst_0/u_la0_top/u_ao_crc32/ 0.004 0.004(0.000)
top/gw_gao_inst_0/u_la0_top/u_ao_match_0/ 0.007 0.007(0.000)
top/gw_gao_inst_0/u_la0_top/u_ao_mem_ctrl/ 98.239 98.239(0.000)
top/uut/ 11.102 11.102(11.102)
top/uut/u_xcorr/ 11.102 11.102(0.000)

Power By Clock Domain:

Clock Domain Clock Frequency(Mhz) Total Dynamic Power(mW)
tck_pad_i 20.000 16.414
clk 100.000 94.059
NO CLOCK DOMAIN 0.000 0.000