Project Settings
Project Name cmult_9 Device Name rev_1: GOWIN-GW2A : GW2A_55
Implementation Name rev_1 Top Module [auto]
Pipelining 1 Retiming 0
Resource Sharing 1 Fanout Guide 10000
Disable I/O Insertion 0 Disable Sequential Optimizations 0
Clock Conversion 1 FSM Compiler 1

Run Status
Job Name Status CPU Time Real Time Memory Date/Time
(compiler)Complete 17 2 0 - 00m:01s - 2018/9/28
13:58:23
(premap)Complete 13 0 0 0m:03s 0m:04s 192MB 2018/9/28
13:58:29
(fpga_mapper)Complete 129 4 0 0m:30s 0m:32s 195MB 2018/9/28
13:59:01
Multi-srs Generator Complete2018/9/28
13:58:24

Area Summary
I/O ports (io_port) 85 Non I/O Register bits (non_io_reg) 15 (0%)
I/O Register bits (total_io_reg) 0 Block Rams (v_ram) 3 (140)
Block Multipliers (dsp_used) 4 (20) LUTs (total_luts) 12 (0%)

Timing Summary
Clock NameReq FreqEst FreqSlack
top|clk190.7 MHz162.1 MHz-0.925

Optimizations Summary
Combined Clock Conversion 1 / 0