@N|Running in 64-bit mode
@N|Running in 64-bit mode
@N: CG1306 :"D:\datasheet\PROJECT\3_10\Gowin_PSRAM_Memory_Interface_HS_2CH_refDesign\GW1NR9-MG100\project\src\psram_syn_top.v":107:0:107:32|Loading library file D:\gwide\49228\Gowin\Gowin_V1.9.7.02Beta\IDE\data\hardware_core\gw1n\prim_syn.v into library work
@N: CG364 :"D:\gwide\49228\Gowin\Gowin_V1.9.7.02Beta\SynplifyPro\lib\generic\gw1n.v":84:7:84:10|Synthesizing module LUT2 in library work.
@N: CG364 :"D:\gwide\49228\Gowin\Gowin_V1.9.7.02Beta\SynplifyPro\lib\generic\gw1n.v":2357:7:2357:11|Synthesizing module DHCEN in library work.
@N: CG364 :"D:\gwide\49228\Gowin\Gowin_V1.9.7.02Beta\SynplifyPro\lib\generic\gw1n.v":2288:7:2288:12|Synthesizing module CLKDIV in library work.
@N: CG364 :"D:\gwide\49228\Gowin\Gowin_V1.9.7.02Beta\SynplifyPro\lib\generic\gw1n.v":302:7:302:9|Synthesizing module INV in library work.
@N: CG364 :"D:\gwide\49228\Gowin\Gowin_V1.9.7.02Beta\SynplifyPro\lib\generic\gw1n.v":2169:7:2169:9|Synthesizing module GSR in library work.
@N: CG364 :"D:\datasheet\PROJECT\3_10\Gowin_PSRAM_Memory_Interface_HS_2CH_refDesign\GW1NR9-MG100\project\src\psram_memory_interface_hs_2ch_v2\psram_memory_interface_hs_2ch_v2.v":26024:8:26024:43|Synthesizing module PSRAM_Memory_Interface_HS_2CH_V2_Top in library work.
@N|Running in 64-bit mode

