PnR Messages

Report Title PnR Report
Design File E:\myWork\IP\releaseVerify\version\1.9.12\Gowin_MIPI_DPHY_Advance_refDesign\MIPI_RefDesign_5a15_MIPI_IO\MIPI_RefDesign\impl\gwsynthesis\MIPI_RefDesign.vg
Physical Constraints File E:\myWork\IP\releaseVerify\version\1.9.12\Gowin_MIPI_DPHY_Advance_refDesign\MIPI_RefDesign_5a15_MIPI_IO\MIPI_RefDesign\src\mipi_rx.cst
Timing Constraints File E:\myWork\IP\releaseVerify\version\1.9.12\Gowin_MIPI_DPHY_Advance_refDesign\MIPI_RefDesign_5a15_MIPI_IO\MIPI_RefDesign\src\mipi_rx.sdc
Tool Version V1.9.12 (64-bit)
Part Number GW5ART-LV15MG132PC1/I0
Device GW5ART-15
Device Version A
Created Time Tue Aug 26 16:49:23 2025
Legal Announcement Copyright (C)2014-2025 Gowin Semiconductor Corporation. All rights reserved.

PnR Details

Place & Route Process Running placement: Placement Phase 0: CPU time = 0h 0m 0.301s, Elapsed time = 0h 0m 0.301s Placement Phase 1: CPU time = 0h 0m 0.156s, Elapsed time = 0h 0m 0.156s Placement Phase 2: CPU time = 0h 0m 0.991s, Elapsed time = 0h 0m 0.991s Placement Phase 3: CPU time = 0h 0m 1s, Elapsed time = 0h 0m 1s Total Placement: CPU time = 0h 0m 2s, Elapsed time = 0h 0m 2s Running routing: Routing Phase 0: CPU time = 0h 0m 0.001s, Elapsed time = 0h 0m 0.002s Routing Phase 1: CPU time = 0h 0m 3s, Elapsed time = 0h 0m 3s Routing Phase 2: CPU time = 0h 0m 0.054s, Elapsed time = 0h 0m 0.054s Routing Phase 3: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s Total Routing: CPU time = 0h 0m 3s, Elapsed time = 0h 0m 3s Generate output files: CPU time = 0h 0m 2s, Elapsed time = 0h 0m 2s
Total Time and Memory Usage CPU time = 0h 0m 7s, Elapsed time = 0h 0m 7s, Peak memory usage = 805MB

Resource

Resource Usage Summary:

Resource Usage Utilization
Logic 2548/15120 17%
    --LUT,ALU,ROM16 2548(2316 LUT, 172 ALU, 60 ROM16) -
    --SSRAM(RAM16) 0 -
Register 1753/15231 12%
    --Logic Register as Latch 0/15120 0%
    --Logic Register as FF 1753/15120 12%
    --I/O Register as Latch 0/111 0%
    --I/O Register as FF 0/111 0%
CLS 2052/7560 28%
I/O Port 25/38 66%
I/O Buf 10 -
    --Input Buf 4 -
    --Output Buf 1 -
    --Inout Buf 5 -
IOLOGIC 4 IDES16
4 IODELAY
8%
BSRAM 7 SDPB
20%

I/O Bank Usage Summary:

I/O Bank UsageUtilization
bank 1 11/1574%
bank 2 0/70%
bank 3 0/80%
bank 4 4/850%

Clock Resource Usage Summary:

Clock Resource Usage Utilization
PRIMARY 4/8 50%
LW 5/8 63%
GCLK_PIN 2/12 17%
CLKDIV 1/8 13%
DHCE 1/8 13%
PLLA 1/2 50%

Global Clock Signals:

Signal Global Clock Location
clkx2x4_d PRIMARY PTR0 PTR1
clk_byte_out PRIMARY PTR0 PTR1
MIPI_RX_Advance_Top/DPHY_RX_INST/HS_CLK PRIMARY PTR0
gw_gao_inst_0/control0[0] PRIMARY PTR0 PTR1
rLockOut LW -
MIPI_RX_Advance_Top/DPHY_RX_INST/u_Aligner/n38_5 LW -
gw_gao_inst_0/gao_jtag_reset LW -
gw_gao_inst_0/u_la0_top/n20_3 LW -
gw_gao_inst_0/u_la0_top/data_out_shift_reg_110_7 LW -
MIPI_RX_Advance_Top/DPHY_RX_INST/HS_CLK HCLK BANK1_BANK2_HCLK2

Pinout by Port Name:

Port Name Diff Pair Loc./Bank Constraint Dir. Site CFG IO Type Drive Pull Mode PCI Clamp Hysteresis Open Drain Slew Rate Vref Single Resistor Diff Resistor BankVccio Pull Strength Ctle
clkx2x4 - N9/1 Y in IOB24[A] GCLKT_2/BPLL_T_IN0/BPLL_T_FB1 LVCMOS18 OFF NONE OFF ON OFF SLOW OFF OFF OFF 1.8 MEDIUM NONE
tms_pad_i - G3/4 N in IOL20[B] TMS LVCMOS33 OFF NONE OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
tck_pad_i - G2/4 N in IOL20[A] TCK LVCMOS33 OFF NONE OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
tdi_pad_i - J3/4 N in IOL24[A] TDI LVCMOS33 OFF NONE OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
tdo_pad_o - J2/4 N out IOL24[B] TDO LVCMOS33 8 NONE OFF OFF OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
MIPI_CLK_RX_P MIPI_CLK_RX_N N11,P11/1 Y io IOB22 GCLKT_3 MIPI OFF NONE OFF NONE OFF SLOW OFF OFF ON 1.8 MEDIUM OFF
MIPI_LANE3_RX_P MIPI_LANE3_RX_N N8,P8/1 Y io IOB20 - MIPI OFF NONE OFF NONE OFF SLOW OFF OFF ON 1.8 MEDIUM OFF
MIPI_LANE2_RX_P MIPI_LANE2_RX_N P10,N10/1 Y io IOB18 D13 MIPI OFF NONE OFF NONE OFF SLOW OFF OFF ON 1.8 MEDIUM OFF
MIPI_LANE1_RX_P MIPI_LANE1_RX_N N12,P12/1 Y io IOB16 - MIPI OFF NONE OFF NONE OFF SLOW OFF OFF ON 1.8 MEDIUM OFF
MIPI_LANE0_RX_P MIPI_LANE0_RX_N P13,N13/1 Y io IOB14 D15 MIPI OFF NONE OFF NONE OFF SLOW OFF OFF ON 1.8 MEDIUM OFF

All Package Pins:

Loc./Bank Signal Dir. Site CFG IO Type Drive Pull Mode PCI Clamp Hysteresis Open Drain Slew Rate Vref Single Resistor Diff Resistor Bank Vccio Pull Strength Ctle
K13/2 - in IOB3[A] D02/MI2 LVCMOS33 8 UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
K14/2 - in IOB3[B] D01/DIN/MISO/MI1 LVCMOS33 8 UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
L14/2 - in IOB5[A] CCLK LVCMOS33 8 UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
L13/2 - in IOB5[B] MCS_N LVCMOS33 8 UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
M14/2 - in IOB7[A] D03/MI3 LVCMOS33 8 UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
M13/2 - in IOB7[B] D00/MOSI/MI0 LVCMOS33 8 UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
M12/2 - in IOB9[A] READY LVCMOS33 8 UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
M8/1 - in IOB11[A] - LVCMOS18 8 UP OFF ON OFF SLOW OFF OFF OFF 1.8 MEDIUM NONE
P14/1 - in IOB12[A] - LVCMOS18 8 UP OFF ON OFF SLOW OFF OFF OFF 1.8 MEDIUM NONE
N14/1 - in IOB12[B] - LVCMOS18 8 UP OFF ON OFF SLOW OFF OFF OFF 1.8 MEDIUM NONE
P13/1 MIPI_LANE0_RX_P io IOB14[A] D15 MIPI OFF NONE OFF NONE OFF SLOW OFF OFF ON 1.8 MEDIUM OFF
N13/1 MIPI_LANE0_RX_N io IOB14[B] D14 MIPI OFF NONE OFF NONE OFF SLOW OFF OFF ON 1.8 MEDIUM OFF
N12/1 MIPI_LANE1_RX_P io IOB16[A] - MIPI OFF NONE OFF NONE OFF SLOW OFF OFF ON 1.8 MEDIUM OFF
P12/1 MIPI_LANE1_RX_N io IOB16[B] - MIPI OFF NONE OFF NONE OFF SLOW OFF OFF ON 1.8 MEDIUM OFF
P10/1 MIPI_LANE2_RX_P io IOB18[A] D13 MIPI OFF NONE OFF NONE OFF SLOW OFF OFF ON 1.8 MEDIUM OFF
N10/1 MIPI_LANE2_RX_N io IOB18[B] D12 MIPI OFF NONE OFF NONE OFF SLOW OFF OFF ON 1.8 MEDIUM OFF
N8/1 MIPI_LANE3_RX_P io IOB20[A] - MIPI OFF NONE OFF NONE OFF SLOW OFF OFF ON 1.8 MEDIUM OFF
P8/1 MIPI_LANE3_RX_N io IOB20[B] - MIPI OFF NONE OFF NONE OFF SLOW OFF OFF ON 1.8 MEDIUM OFF
N11/1 MIPI_CLK_RX_P io IOB22[A] GCLKT_3 MIPI OFF NONE OFF NONE OFF SLOW OFF OFF ON 1.8 MEDIUM OFF
P11/1 MIPI_CLK_RX_N io IOB22[B] GCLKC_3 MIPI OFF NONE OFF NONE OFF SLOW OFF OFF ON 1.8 MEDIUM OFF
N9/1 clkx2x4 in IOB24[A] GCLKT_2/BPLL_T_IN0/BPLL_T_FB1 LVCMOS18 OFF NONE OFF ON OFF SLOW OFF OFF OFF 1.8 MEDIUM NONE
P9/1 - in IOB24[B] GCLKC_2/BPLL_C_IN0/BPLL_C_FB1 LVCMOS18 8 UP OFF ON OFF SLOW OFF OFF OFF 1.8 MEDIUM NONE
J12/1 - in IOB31[A] - LVCMOS18 - UP - - - - - - - - - -
H13/1 - in IOB32[A] GCLKT_1/BPLL_T_IN1/BPLL_T_FB0 LVCMOS18 - UP - - - - - - - - - -
G13/1 - in IOB32[B] GCLKC_1/BPLL_C_IN1/BPLL_C_FB0 LVCMOS18 - UP - - - - - - - - - -
F13/1 - in IOB34[A] GCLKT_0 LVCMOS18 - UP - - - - - - - - - -
E13/1 - in IOB34[B] GCLKC_0 LVCMOS18 - UP - - - - - - - - - -
D13/1 - in IOB36[A] - LVCMOS18 - UP - - - - - - - - - -
C13/1 - in IOB36[B] - LVCMOS18 - UP - - - - - - - - - -
D14/1 - in IOB39[A] D11 LVCMOS18 - NONE - - - - - - - - - -
C14/1 - in IOB39[B] D10 LVCMOS18 - NONE - - - - - - - - - -
J13/1 - in IOB41[A] - LVCMOS18 - UP - - - - - - - - - -
J14/1 - in IOB41[B] - LVCMOS18 - UP - - - - - - - - - -
F14/1 - in IOB43[A] D09 LVCMOS18 - NONE - - - - - - - - - -
E14/1 - in IOB43[B] D08 LVCMOS18 - NONE - - - - - - - - - -
H14/1 - in IOB45[A] - LVCMOS18 - UP - - - - - - - - - -
G14/1 - in IOB45[B] EMCCLK LVCMOS18 - UP - - - - - - - - - -
G2/4 tck_pad_i in IOL20[A] TCK LVCMOS33 OFF NONE OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
G3/4 tms_pad_i in IOL20[B] TMS LVCMOS33 OFF NONE OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
H3/4 - in IOL22[A] GCLKT_7/Q0REF_T_IN0/SSPI_CLK LVCMOS33 8 UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
H2/4 - in IOL22[B] GCLKC_7/Q0REF_C_IN0/RDWR_B/SO/SSI1/PCIE_HOST_RSTN LVCMOS33 8 UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
J3/4 tdi_pad_i in IOL24[A] TDI LVCMOS33 OFF NONE OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
J2/4 tdo_pad_o out IOL24[B] TDO LVCMOS33 8 NONE OFF OFF OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
K3/4 - in IOL26[A] GCLKT_6/LPLL_T_IN0/LPLL_T_FB1/Q0REF_T_IN1/D06/CLKHOLD_N/SSI3 LVCMOS33 8 UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
K2/4 - in IOL26[B] GCLKC_6/LPLL_C_IN0/LPLL_C_FB1/Q0REF_C_IN1/D07/SSPI_WPN/SSI2 LVCMOS33 8 UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
L3/3 - in IOL29[A] DONE LVCMOS33 8 UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
M3/3 - in IOL29[B] RECONFIG_N LVCMOS33 8 UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
N1/3 - in IOL31[A] GCLKT_5/MODE1 LVCMOS33 8 UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
N2/3 - in IOL31[B] GCLKC_5/MODE0 LVCMOS33 8 UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
M2/3 - out IOL33[A] GCLKT_4/LPLL_T_IN1/LPLL_T_FB0/CSO_B/DOUT/SCL LVCMOS33 8 UP OFF OFF OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
M1/3 - in IOL33[B] GCLKC_4/LPLL_C_IN1/LPLL_C_FB0/CSI_B/SDA LVCMOS33 8 UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
P2/3 - in IOL35[A] D04/SI/SSI0 LVCMOS33 8 UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
P1/3 - in IOL35[B] D05/SSPI_CS_N LVCMOS33 8 UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE
P5/MIPI - inout M0_CKN - - - - - - - - - - - - - -
N5/MIPI - inout M0_CKP - - - - - - - - - - - - - -
P7/MIPI - inout M0_D0N - - - - - - - - - - - - - -
N7/MIPI - inout M0_D0P - - - - - - - - - - - - - -
P6/MIPI - inout M0_D1N - - - - - - - - - - - - - -
N6/MIPI - inout M0_D1P - - - - - - - - - - - - - -
P4/MIPI - inout M0_D2N - - - - - - - - - - - - - -
N4/MIPI - inout M0_D2P - - - - - - - - - - - - - -
P3/MIPI - inout M0_D3N - - - - - - - - - - - - - -
N3/MIPI - inout M0_D3P - - - - - - - - - - - - - -
F2/MIPI - inout M1_D0A - - - - - - - - - - - - - -
F1/MIPI - inout M1_D0B - - - - - - - - - - - - - -
G1/MIPI - inout M1_D0C - - - - - - - - - - - - - -
L1/MIPI - inout M1_D1A - - - - - - - - - - - - - -
K1/MIPI - inout M1_D1B - - - - - - - - - - - - - -
J1/MIPI - inout M1_D1C - - - - - - - - - - - - - -
C1/MIPI - inout M1_D2A - - - - - - - - - - - - - -
D2/MIPI - inout M1_D2B - - - - - - - - - - - - - -
D1/MIPI - inout M1_D2C - - - - - - - - - - - - - -
A1/Q0 - in Q0_LN0_RXM_I - - - - - - - - - - - - - -
A2/Q0 - in Q0_LN0_RXP_I - - - - - - - - - - - - - -
C3/Q0 - out Q0_LN0_TXM_O - - - - - - - - - - - - - -
B3/Q0 - out Q0_LN0_TXP_O - - - - - - - - - - - - - -
A5/Q0 - in Q0_LN1_RXM_I - - - - - - - - - - - - - -
A4/Q0 - in Q0_LN1_RXP_I - - - - - - - - - - - - - -
C6/Q0 - out Q0_LN1_TXM_O - - - - - - - - - - - - - -
B6/Q0 - out Q0_LN1_TXP_O - - - - - - - - - - - - - -
A11/Q0 - in Q0_LN2_RXM_I - - - - - - - - - - - - - -
A10/Q0 - in Q0_LN2_RXP_I - - - - - - - - - - - - - -
C8/Q0 - out Q0_LN2_TXM_O - - - - - - - - - - - - - -
B8/Q0 - out Q0_LN2_TXP_O - - - - - - - - - - - - - -
A14/Q0 - in Q0_LN3_RXM_I - - - - - - - - - - - - - -
A13/Q0 - in Q0_LN3_RXP_I - - - - - - - - - - - - - -
B12/Q0 - out Q0_LN3_TXM_O - - - - - - - - - - - - - -
C12/Q0 - out Q0_LN3_TXP_O - - - - - - - - - - - - - -
A7/Q0 - in Q0_REFCLKM_0 - - - - - - - - - - - - - -
B10/Q0 - in Q0_REFCLKM_1 - - - - - - - - - - - - - -
A8/Q0 - in Q0_REFCLKP_0 - - - - - - - - - - - - - -
C10/Q0 - in Q0_REFCLKP_1 - - - - - - - - - - - - - -