@W: CG1340 :"D:\IP release\spi_sram\Gowin_SPI_RefDesign_For_Release_190917\Gowin_SPI_Slave_RefDesign\project\gw_spi_slave\src\spi_slave.v":106:64:106:73|Index into variable miso_shift_reg could be out of range ; a simulation mismatch is possible.
@W: CL279 :"D:\IP release\spi_sram\Gowin_SPI_RefDesign_For_Release_190917\Gowin_SPI_Slave_RefDesign\project\gw_spi_slave\src\spi_slave.v":94:4:94:9|Pruning register bits 5 to 3 of genblk2.tx_cnt[5:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level.

