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	  GOWIN SPI IP Design Example Read Me
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Object device:GW1N-4-LQ144
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File List:
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.
|-- doc
|   `-- spi_readme.txt                      -->  Read Me file (this file)
|   `--Gowin_SPI_refDesign使用说明.docx     -->  The description of design
|-- tb 
|   `-- spi_tb.v                            -->  TestBench for Example Slave design
|-- simulate_vo
|   `-- gw_spi_master.vo                    -->  Verilog simulation File for spi_tb
|   `-- gw_spi_slave.vo                     -->  Verilog simulation File for spi_tb
|-- simlib
|   `-- gw1n
|       `-- prim_sim.v                      -->  Gowin gw1n FPGA simulation library file
|   `-- gw2a
|       `-- prim_sim.v                      -->  Gowin gw2a FPGA simulation library file
|-- project
    `-- gw_spi_master.gprj          	    -->  GowinYunYuan Project File for Example Design
    `-- gw_spi_master.gprj.user        	    -->  GowinYunYuan Project File for Example Design
    |-- impl
    |   |-- gwsynthesis
    |   |-- pnr                             -->  GowinYunYuan Place & Route Config File for Example Design
    |   |-- synthesize
    |   `-- commonsyn_config.ini            -->  Synplify_Pro Config File for Example Design
    |   `-- dualpin_config.ini
    |   `-- gowinsyn_config.ini
    |   `-- pnr_config.ini                  
    |   `-- synthesis_config.ini
    |-- src 
        |-- gowin_pll                       -->  File for GowinYunYuan Project
        |-- spi_master                      -->  File for GowinYunYuan Project
        `-- gw_spi_master.cst               -->  File for GowinYunYuan Project
        `-- gw_spi_master.sdc               -->  File for GowinYunYuan Project
        `-- gw_spi_master.v                 -->  File for GowinYunYuan Project
        `-- master_sram_spi.v               -->  File for GowinYunYuan Project 


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HOW TO OPEN A PROJECT IN GowinYunYuan:
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1. Unzip the respective design files.
2. Launch GowinYunYuan and select "File -> Open -> Project"
3. In the Open Project dialog, enter the Project location -- "project",select the project "gw_spi_master.gprj".
4. Click Finish. Now the project is successfully loaded. 

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HOW TO RUN SYNTHESIZE, PLACE AND ROUTE, IP CORE GENERATION, AND TIMING ANALYSIS IN GowinYunYuan:
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1. Click the Process tab in the process panel of the GowinYunYuan dashboard. 
   Double click on Synthsize(Synplify Pro). This will bring the design through synthesis.
2. Click the Process tab in the process panel of the GowinYunYuan dashboard. 
   Double click on Place & Route. This will bring the design through mapping, place and route.
3. Once Place & Route is done, user can double click on Timing Analysis Report to get 
   the timing analysis result.
4. Click on "Project -> Configuration -> Place & Route" to configurate the Post-Place File 
   and SDF File of the design.

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HOW TO RUN SIMULATION
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1. User can run functional simulation by software Modelsim by compiling below files into the library:
1) simlib/gw1n/prim_sim.v or simlib/gw2a/prim_sim.v
2) simulate_vo/gw_spi_master.vo
3) simulate_vo/gw_spi_slave.vo
4) tb/spi_tb.v 
2. User can check waveform by software Modelsim.
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