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Documentation Database

The DK-START-GW1NS2 V2.1 development board uses GOWIN's GW1NS-2C SoC FPGA device.  The SoC FPGA embeds an ARM Cortex-M3 hard processor with a 2K LUT FPGA fabric. In addition, the GW1NS family of FPGA products includes a USB 2.0 PHY, user flash, and an 8 channel ADC. With the ARM Cortex-M3 hard processor as the core, the minimum memory required to implement system functions is included. The embedded FPGA logic module is convenient and flexible and can implement a variety of peripheral control functions, providing excellent computing capability. System response interrupt, high performance, low power consumption, flexible use, instant start, low cost, non-volatile memory, high security, easy to expand, etc., can effectively reduce learning costs, helping users to quickly enter programmable logic device design and development areas.


The development board is designed with a wealth of external interfaces, including LVDS interface and GPIO interface. In addition, external USB TYPE-C interface, slide switch, push button switch, clock, LED, and other resources can be used by developers or enthusiasts.



Documents Download
- Minimum FPGA System SCH Download
User Guide DK-START-GW1NS2 V2.1 Development Board User Guide Download
- BSDL Download
- Gowin FPGA SCH Symbol Download
User Guide DK-START-GW1NS2 Quick Start Guide Download
Schematic DK-START-GW1NS2 SCH_V2.1 Download