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DK_START_GW1NSR-LX2CQN48PC5I4_V2.1

Previous Name: DK-START-GW1NSR2 V2.1

DK_START_GW1NSR-LX2CQN48PC5I4_V2.1

The development board adopts the GW1NSR-2 SoC FPGA. SoC FPFA is embedded with an ARM Cortex-M3 hard core processor, 32Mbit PSRAM, 1Mbit User Flash and eight-channel ADC converter, etc. When the ARM Cortex-M3 hard-core processor is employed as the core, the needs of the Min. memory can be met. FPGA logic resources and other embedded resources can flexibly facilitate the peripheral control functions, which provide excellent calculation functions and exceptional system response interrupts. They also offer high performance, low power consumption, flexible usage, instant start-up, affordability, nonvolatile, high security, and abundant package types, among other benefits.

 

The development board offers abundant external interfaces, including MIPI/LVDS interfaces, GPIO interfaces, ADC interfaces, slide switches,LED, clock, reset, etc.

Documents Download
Data Sheet GW1NSR series of FPGA Products Datasheet Download
User Guide DK_START_GW1NSR2_V2.1 Development Board User Guide Download
User Guide DK_START_GW1NSR2_V1.1 Development Board User Guide Download
User Guide DK-START-GW1NSR2 Development Board Quick Start User Guide Download
Schematic DK-START-GW1NSR-LX2CQN48PC5I4_V2.1 Schematic Download
- Minimum FPGA System SCH Download
- BSDL Download
- Gowin FPGA SCH Symbol Download
Schematic DK_START_GW1NSR2 SCH_V1.1 Download
User Guide DK_START_GW1NSR-LX2CQN48PC5I4_V2.1 Development Board User Guide Download
User Guide DK-START-GW1NSR2_V1.1 Development Board Quick Start User Guide Download
Schematic DK-START-GW1NSR2 SCH V2.1 Download