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2
GW1NS-4

 

Features

  • MIPI CSI/DSI RX & TX with fully integrated MIPI DPHY
  • Hardcore ARM CortexM3
  • SecureFPGA using SRAM PUF Technology
  • GoAI 2.0 High Performance, Low Cost, Low Power Edge AI Solution
  • On-chip pSRAM Memory 64Mb
  • User Flash 256Kb

 

 

GW1NS-4 Architecture Overview (Figure 1)

 

 

GW1NS-4 Architecture Overview (Figure 2)

 

 

 

 

GW1NS-4 Family Table

Parameter GW1NS-4 GW1NS-4C
LUT4 4,608 4,608
FF 3,456 3,456
B-SRAM bits 180K 180K
B-SRAM quantity 10 10
18 X 18 Multiplier 16 16
S-SRAM bits - -
User Flash bits 256K 256K
PLLs  2 2
OSC 1,+/- 5% accuracy 1,+/- 5% accuracy
Hard Core Processor - Cortex-M3
USB PHY - -
ADC Channels - -
I/O Banks 4 4
Max. User I/O 106 106
Core Voltage 1.2V 1.2V

 

Package Options with Max I/O (Refer to the latest datasheet for details)

Package Pitch(mm) Size(mm) GW1NS-4 GW1NS-4C
CS36 0.4 2.5 x 2.5 - -
CS49 0.4 2.9 x 2.9 42(8) 42(8)
MG64 0.5 4.2 x 4.2 57(8) 57(8)
QN32 0.5 5 x 5 - -
QN32U 0.5 5 x 5 - -
QN48 0.4 6 x 6 38(4) 38(4)
LQ144 0.5 20 x 20 - -

 

 

 


GW1NS-4 Development Board


For further details of this development board, please click here to visit.

 

To request for sample/ development boards, please click here to visit GoAI web page. (insert GoAI page link)

 

GW1NS4 documents
- GW1NS series of FPGA Products Data Sheet

- GW1NSR series of FPGA Products Data sheet



Support GoAI

GW1NS-4 series supports our GoAI features. For further details, please click here to visit GoAI web page.